xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/arm-realview-eb-a9mp.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun/*
2*4882a593Smuzhiyun * Copyright 2016 Linaro Ltd
3*4882a593Smuzhiyun *
4*4882a593Smuzhiyun * Permission is hereby granted, free of charge, to any person obtaining a copy
5*4882a593Smuzhiyun * of this software and associated documentation files (the "Software"), to deal
6*4882a593Smuzhiyun * in the Software without restriction, including without limitation the rights
7*4882a593Smuzhiyun * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
8*4882a593Smuzhiyun * copies of the Software, and to permit persons to whom the Software is
9*4882a593Smuzhiyun * furnished to do so, subject to the following conditions:
10*4882a593Smuzhiyun *
11*4882a593Smuzhiyun * The above copyright notice and this permission notice shall be included in
12*4882a593Smuzhiyun * all copies or substantial portions of the Software.
13*4882a593Smuzhiyun *
14*4882a593Smuzhiyun * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
15*4882a593Smuzhiyun * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
16*4882a593Smuzhiyun * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
17*4882a593Smuzhiyun * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
18*4882a593Smuzhiyun * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
19*4882a593Smuzhiyun * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
20*4882a593Smuzhiyun * THE SOFTWARE.
21*4882a593Smuzhiyun */
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun/dts-v1/;
24*4882a593Smuzhiyun#include "arm-realview-eb-mp.dtsi"
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun/ {
27*4882a593Smuzhiyun	model = "ARM RealView EB Cortex A9 MPCore";
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun	/*
30*4882a593Smuzhiyun	 * This is the Cortex A9 MPCore tile used with the
31*4882a593Smuzhiyun	 * RealView EB.
32*4882a593Smuzhiyun	 */
33*4882a593Smuzhiyun	cpus {
34*4882a593Smuzhiyun		#address-cells = <1>;
35*4882a593Smuzhiyun		#size-cells = <0>;
36*4882a593Smuzhiyun		enable-method = "arm,realview-smp";
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		A9_0: cpu@0 {
39*4882a593Smuzhiyun			device_type = "cpu";
40*4882a593Smuzhiyun			compatible = "arm,cortex-a9";
41*4882a593Smuzhiyun			reg = <0>;
42*4882a593Smuzhiyun			next-level-cache = <&L2>;
43*4882a593Smuzhiyun		};
44*4882a593Smuzhiyun
45*4882a593Smuzhiyun		A9_1: cpu@1 {
46*4882a593Smuzhiyun			device_type = "cpu";
47*4882a593Smuzhiyun			compatible = "arm,cortex-a9";
48*4882a593Smuzhiyun			reg = <1>;
49*4882a593Smuzhiyun			next-level-cache = <&L2>;
50*4882a593Smuzhiyun		};
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun		A9_2: cpu@2 {
53*4882a593Smuzhiyun			device_type = "cpu";
54*4882a593Smuzhiyun			compatible = "arm,cortex-a9";
55*4882a593Smuzhiyun			reg = <2>;
56*4882a593Smuzhiyun			next-level-cache = <&L2>;
57*4882a593Smuzhiyun		};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun		A9_3: cpu@3 {
60*4882a593Smuzhiyun			device_type = "cpu";
61*4882a593Smuzhiyun			compatible = "arm,cortex-a9";
62*4882a593Smuzhiyun			reg = <3>;
63*4882a593Smuzhiyun			next-level-cache = <&L2>;
64*4882a593Smuzhiyun		};
65*4882a593Smuzhiyun	};
66*4882a593Smuzhiyun};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun&pmu {
69*4882a593Smuzhiyun	interrupt-affinity = <&A9_0>, <&A9_1>, <&A9_2>, <&A9_3>;
70*4882a593Smuzhiyun};
71