xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/am57xx-idk-common.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2015-2016 Texas Instruments Incorporated - https://www.ti.com/
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun#include "am57xx-industrial-grade.dtsi"
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun/ {
9*4882a593Smuzhiyun	aliases {
10*4882a593Smuzhiyun		rtc0 = &tps659038_rtc;
11*4882a593Smuzhiyun		rtc1 = &rtc;
12*4882a593Smuzhiyun		display0 = &hdmi0;
13*4882a593Smuzhiyun	};
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	chosen {
16*4882a593Smuzhiyun		stdout-path = &uart3;
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	vmain: fixedregulator-vmain {
20*4882a593Smuzhiyun		compatible = "regulator-fixed";
21*4882a593Smuzhiyun		regulator-name = "VMAIN";
22*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
23*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
24*4882a593Smuzhiyun		regulator-always-on;
25*4882a593Smuzhiyun		regulator-boot-on;
26*4882a593Smuzhiyun	};
27*4882a593Smuzhiyun
28*4882a593Smuzhiyun	v3_3d: fixedregulator-v3_3d {
29*4882a593Smuzhiyun		compatible = "regulator-fixed";
30*4882a593Smuzhiyun		regulator-name = "V3_3D";
31*4882a593Smuzhiyun		vin-supply = <&smps9_reg>;
32*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
33*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
34*4882a593Smuzhiyun		regulator-always-on;
35*4882a593Smuzhiyun		regulator-boot-on;
36*4882a593Smuzhiyun	};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun	v1_2d: fixedregulator-v1_2d {
39*4882a593Smuzhiyun		compatible = "regulator-fixed";
40*4882a593Smuzhiyun		regulator-name = "V1_2D";
41*4882a593Smuzhiyun		vin-supply = <&vmain>;
42*4882a593Smuzhiyun		regulator-min-microvolt = <1200000>;
43*4882a593Smuzhiyun		regulator-max-microvolt = <1200000>;
44*4882a593Smuzhiyun		regulator-always-on;
45*4882a593Smuzhiyun		regulator-boot-on;
46*4882a593Smuzhiyun	};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun	vtt_fixed: fixedregulator-vtt {
49*4882a593Smuzhiyun		/* TPS51200 */
50*4882a593Smuzhiyun		compatible = "regulator-fixed";
51*4882a593Smuzhiyun		regulator-name = "vtt_fixed";
52*4882a593Smuzhiyun		vin-supply = <&v3_3d>;
53*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
54*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
55*4882a593Smuzhiyun		regulator-always-on;
56*4882a593Smuzhiyun		regulator-boot-on;
57*4882a593Smuzhiyun	};
58*4882a593Smuzhiyun
59*4882a593Smuzhiyun	leds-iio {
60*4882a593Smuzhiyun		status = "disabled";
61*4882a593Smuzhiyun		compatible = "gpio-leds";
62*4882a593Smuzhiyun		led-out0 {
63*4882a593Smuzhiyun			label = "out0";
64*4882a593Smuzhiyun			gpios = <&tpic2810 0 GPIO_ACTIVE_HIGH>;
65*4882a593Smuzhiyun			default-state = "off";
66*4882a593Smuzhiyun		};
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun		led-out1 {
69*4882a593Smuzhiyun			label = "out1";
70*4882a593Smuzhiyun			gpios = <&tpic2810 1 GPIO_ACTIVE_HIGH>;
71*4882a593Smuzhiyun			default-state = "off";
72*4882a593Smuzhiyun		};
73*4882a593Smuzhiyun
74*4882a593Smuzhiyun		led-out2 {
75*4882a593Smuzhiyun			label = "out2";
76*4882a593Smuzhiyun			gpios = <&tpic2810 2 GPIO_ACTIVE_HIGH>;
77*4882a593Smuzhiyun			default-state = "off";
78*4882a593Smuzhiyun		};
79*4882a593Smuzhiyun
80*4882a593Smuzhiyun		led-out3 {
81*4882a593Smuzhiyun			label = "out3";
82*4882a593Smuzhiyun			gpios = <&tpic2810 3 GPIO_ACTIVE_HIGH>;
83*4882a593Smuzhiyun			default-state = "off";
84*4882a593Smuzhiyun		};
85*4882a593Smuzhiyun
86*4882a593Smuzhiyun		led-out4 {
87*4882a593Smuzhiyun			label = "out4";
88*4882a593Smuzhiyun			gpios = <&tpic2810 4 GPIO_ACTIVE_HIGH>;
89*4882a593Smuzhiyun			default-state = "off";
90*4882a593Smuzhiyun		};
91*4882a593Smuzhiyun
92*4882a593Smuzhiyun		led-out5 {
93*4882a593Smuzhiyun			label = "out5";
94*4882a593Smuzhiyun			gpios = <&tpic2810 5 GPIO_ACTIVE_HIGH>;
95*4882a593Smuzhiyun			default-state = "off";
96*4882a593Smuzhiyun		};
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun		led-out6 {
99*4882a593Smuzhiyun			label = "out6";
100*4882a593Smuzhiyun			gpios = <&tpic2810 6 GPIO_ACTIVE_HIGH>;
101*4882a593Smuzhiyun			default-state = "off";
102*4882a593Smuzhiyun		};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun		led-out7 {
105*4882a593Smuzhiyun			label = "out7";
106*4882a593Smuzhiyun			gpios = <&tpic2810 7 GPIO_ACTIVE_HIGH>;
107*4882a593Smuzhiyun			default-state = "off";
108*4882a593Smuzhiyun		};
109*4882a593Smuzhiyun	};
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun	hdmi0: connector@0 {
112*4882a593Smuzhiyun		compatible = "hdmi-connector";
113*4882a593Smuzhiyun		label = "hdmi";
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun		type = "a";
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun		port {
118*4882a593Smuzhiyun			hdmi_connector_in: endpoint {
119*4882a593Smuzhiyun				remote-endpoint = <&tpd12s015_out>;
120*4882a593Smuzhiyun			};
121*4882a593Smuzhiyun		};
122*4882a593Smuzhiyun	};
123*4882a593Smuzhiyun
124*4882a593Smuzhiyun	tpd12s015: encoder@0 {
125*4882a593Smuzhiyun		compatible = "ti,tpd12s016", "ti,tpd12s015";
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun		gpios = <0>, /* optional CT_CP_HPD */
128*4882a593Smuzhiyun			<0>, /* optional LS_OE */
129*4882a593Smuzhiyun			<&gpio7 12 GPIO_ACTIVE_HIGH>;	/* HPD */
130*4882a593Smuzhiyun
131*4882a593Smuzhiyun		ports {
132*4882a593Smuzhiyun			#address-cells = <1>;
133*4882a593Smuzhiyun			#size-cells = <0>;
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun			port@0 {
136*4882a593Smuzhiyun				reg = <0>;
137*4882a593Smuzhiyun
138*4882a593Smuzhiyun				tpd12s015_in: endpoint@0 {
139*4882a593Smuzhiyun					remote-endpoint = <&hdmi_out>;
140*4882a593Smuzhiyun				};
141*4882a593Smuzhiyun			};
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun			port@1 {
144*4882a593Smuzhiyun				reg = <1>;
145*4882a593Smuzhiyun
146*4882a593Smuzhiyun				tpd12s015_out: endpoint@0 {
147*4882a593Smuzhiyun					remote-endpoint = <&hdmi_connector_in>;
148*4882a593Smuzhiyun				};
149*4882a593Smuzhiyun			};
150*4882a593Smuzhiyun		};
151*4882a593Smuzhiyun	};
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun	src_clk_x1: src_clk_x1 {
154*4882a593Smuzhiyun		#clock-cells = <0>;
155*4882a593Smuzhiyun		compatible = "fixed-clock";
156*4882a593Smuzhiyun		clock-frequency = <20000000>;
157*4882a593Smuzhiyun	};
158*4882a593Smuzhiyun};
159*4882a593Smuzhiyun
160*4882a593Smuzhiyun&dra7_pmx_core {
161*4882a593Smuzhiyun	dcan1_pins_default: dcan1_pins_default {
162*4882a593Smuzhiyun		pinctrl-single,pins = <
163*4882a593Smuzhiyun			DRA7XX_CORE_IOPAD(0x37d0, PIN_OUTPUT_PULLUP | MUX_MODE0)	/* dcan1_tx */
164*4882a593Smuzhiyun			DRA7XX_CORE_IOPAD(0x37d4, PIN_INPUT_PULLUP | MUX_MODE0)		/* dcan1_rx */
165*4882a593Smuzhiyun		>;
166*4882a593Smuzhiyun	};
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun	dcan1_pins_sleep: dcan1_pins_sleep {
169*4882a593Smuzhiyun		pinctrl-single,pins = <
170*4882a593Smuzhiyun			DRA7XX_CORE_IOPAD(0x37d0, MUX_MODE15 | PULL_UP)	/* dcan1_tx.off */
171*4882a593Smuzhiyun			DRA7XX_CORE_IOPAD(0x37d4, MUX_MODE15 | PULL_UP)	/* dcan1_rx.off */
172*4882a593Smuzhiyun		>;
173*4882a593Smuzhiyun	};
174*4882a593Smuzhiyun};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun&i2c1 {
177*4882a593Smuzhiyun	status = "okay";
178*4882a593Smuzhiyun	clock-frequency = <400000>;
179*4882a593Smuzhiyun
180*4882a593Smuzhiyun	tps659038: tps659038@58 {
181*4882a593Smuzhiyun		compatible = "ti,tps659038";
182*4882a593Smuzhiyun		reg = <0x58>;
183*4882a593Smuzhiyun		interrupts-extended = <&gpio6 16 IRQ_TYPE_LEVEL_HIGH
184*4882a593Smuzhiyun			       &dra7_pmx_core 0x418>;
185*4882a593Smuzhiyun		#interrupt-cells = <2>;
186*4882a593Smuzhiyun		interrupt-controller;
187*4882a593Smuzhiyun		ti,system-power-controller;
188*4882a593Smuzhiyun		ti,palmas-override-powerhold;
189*4882a593Smuzhiyun
190*4882a593Smuzhiyun		tps659038_pmic {
191*4882a593Smuzhiyun			compatible = "ti,tps659038-pmic";
192*4882a593Smuzhiyun
193*4882a593Smuzhiyun			smps12-in-supply = <&vmain>;
194*4882a593Smuzhiyun			smps3-in-supply = <&vmain>;
195*4882a593Smuzhiyun			smps45-in-supply = <&vmain>;
196*4882a593Smuzhiyun			smps6-in-supply = <&vmain>;
197*4882a593Smuzhiyun			smps7-in-supply = <&vmain>;
198*4882a593Smuzhiyun			smps8-in-supply = <&vmain>;
199*4882a593Smuzhiyun			smps9-in-supply = <&vmain>;
200*4882a593Smuzhiyun			ldo1-in-supply = <&vmain>;
201*4882a593Smuzhiyun			ldo2-in-supply = <&vmain>;
202*4882a593Smuzhiyun			ldo3-in-supply = <&vmain>;
203*4882a593Smuzhiyun			ldo4-in-supply = <&vmain>;
204*4882a593Smuzhiyun			ldo9-in-supply = <&vmain>;
205*4882a593Smuzhiyun			ldoln-in-supply = <&vmain>;
206*4882a593Smuzhiyun			ldousb-in-supply = <&vmain>;
207*4882a593Smuzhiyun			ldortc-in-supply = <&vmain>;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun			regulators {
210*4882a593Smuzhiyun				smps12_reg: smps12 {
211*4882a593Smuzhiyun					/* VDD_MPU */
212*4882a593Smuzhiyun					regulator-name = "smps12";
213*4882a593Smuzhiyun					regulator-min-microvolt = <850000>;
214*4882a593Smuzhiyun					regulator-max-microvolt = <1250000>;
215*4882a593Smuzhiyun					regulator-always-on;
216*4882a593Smuzhiyun					regulator-boot-on;
217*4882a593Smuzhiyun				};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun				smps3_reg: smps3 {
220*4882a593Smuzhiyun					/* VDD_DDR EMIF1 EMIF2 */
221*4882a593Smuzhiyun					regulator-name = "smps3";
222*4882a593Smuzhiyun					regulator-min-microvolt = <1350000>;
223*4882a593Smuzhiyun					regulator-max-microvolt = <1350000>;
224*4882a593Smuzhiyun					regulator-always-on;
225*4882a593Smuzhiyun					regulator-boot-on;
226*4882a593Smuzhiyun				};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun				smps45_reg: smps45 {
229*4882a593Smuzhiyun					/* VDD_DSPEVE on AM572 */
230*4882a593Smuzhiyun					/* VDD_IVA + VDD_DSP on AM571 */
231*4882a593Smuzhiyun					regulator-name = "smps45";
232*4882a593Smuzhiyun					regulator-min-microvolt = <850000>;
233*4882a593Smuzhiyun					regulator-max-microvolt = <1250000>;
234*4882a593Smuzhiyun					regulator-always-on;
235*4882a593Smuzhiyun					regulator-boot-on;
236*4882a593Smuzhiyun				};
237*4882a593Smuzhiyun
238*4882a593Smuzhiyun				smps6_reg: smps6 {
239*4882a593Smuzhiyun					/* VDD_GPU */
240*4882a593Smuzhiyun					regulator-name = "smps6";
241*4882a593Smuzhiyun					regulator-min-microvolt = <850000>;
242*4882a593Smuzhiyun					regulator-max-microvolt = <1250000>;
243*4882a593Smuzhiyun					regulator-always-on;
244*4882a593Smuzhiyun					regulator-boot-on;
245*4882a593Smuzhiyun				};
246*4882a593Smuzhiyun
247*4882a593Smuzhiyun				smps7_reg: smps7 {
248*4882a593Smuzhiyun					/* VDD_CORE */
249*4882a593Smuzhiyun					regulator-name = "smps7";
250*4882a593Smuzhiyun					regulator-min-microvolt = <850000>;
251*4882a593Smuzhiyun					regulator-max-microvolt = <1150000>;
252*4882a593Smuzhiyun					regulator-always-on;
253*4882a593Smuzhiyun					regulator-boot-on;
254*4882a593Smuzhiyun				};
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun				smps8_reg: smps8 {
257*4882a593Smuzhiyun					/* 5728 - VDD_IVAHD */
258*4882a593Smuzhiyun					/* 5718 - N.C. test point */
259*4882a593Smuzhiyun					regulator-name = "smps8";
260*4882a593Smuzhiyun				};
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun				smps9_reg: smps9 {
263*4882a593Smuzhiyun					/* VDD_3_3D */
264*4882a593Smuzhiyun					regulator-name = "smps9";
265*4882a593Smuzhiyun					regulator-min-microvolt = <3300000>;
266*4882a593Smuzhiyun					regulator-max-microvolt = <3300000>;
267*4882a593Smuzhiyun					regulator-always-on;
268*4882a593Smuzhiyun					regulator-boot-on;
269*4882a593Smuzhiyun				};
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun				ldo1_reg: ldo1 {
272*4882a593Smuzhiyun					/* VDDSHV8 - VSDMMC  */
273*4882a593Smuzhiyun					/* NOTE: on rev 1.3a, data supply */
274*4882a593Smuzhiyun					regulator-name = "ldo1";
275*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
276*4882a593Smuzhiyun					regulator-max-microvolt = <3300000>;
277*4882a593Smuzhiyun					regulator-boot-on;
278*4882a593Smuzhiyun					regulator-always-on;
279*4882a593Smuzhiyun				};
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun				ldo2_reg: ldo2 {
282*4882a593Smuzhiyun					/* VDDSH18V */
283*4882a593Smuzhiyun					regulator-name = "ldo2";
284*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
285*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
286*4882a593Smuzhiyun					regulator-always-on;
287*4882a593Smuzhiyun					regulator-boot-on;
288*4882a593Smuzhiyun				};
289*4882a593Smuzhiyun
290*4882a593Smuzhiyun				ldo3_reg: ldo3 {
291*4882a593Smuzhiyun					/* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
292*4882a593Smuzhiyun					regulator-name = "ldo3";
293*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
294*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
295*4882a593Smuzhiyun					regulator-always-on;
296*4882a593Smuzhiyun					regulator-boot-on;
297*4882a593Smuzhiyun				};
298*4882a593Smuzhiyun
299*4882a593Smuzhiyun				ldo4_reg: ldo4 {
300*4882a593Smuzhiyun					/* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
301*4882a593Smuzhiyun					regulator-name = "ldo4";
302*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
303*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
304*4882a593Smuzhiyun					regulator-always-on;
305*4882a593Smuzhiyun					regulator-boot-on;
306*4882a593Smuzhiyun				};
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun				/* LDO5-8 unused */
309*4882a593Smuzhiyun
310*4882a593Smuzhiyun				ldo9_reg: ldo9 {
311*4882a593Smuzhiyun					/* VDD_RTC  */
312*4882a593Smuzhiyun					regulator-name = "ldo9";
313*4882a593Smuzhiyun					regulator-min-microvolt = <840000>;
314*4882a593Smuzhiyun					regulator-max-microvolt = <1160000>;
315*4882a593Smuzhiyun					regulator-always-on;
316*4882a593Smuzhiyun					regulator-boot-on;
317*4882a593Smuzhiyun				};
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun				ldoln_reg: ldoln {
320*4882a593Smuzhiyun					/* VDDA_1V8_PLL */
321*4882a593Smuzhiyun					regulator-name = "ldoln";
322*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
323*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
324*4882a593Smuzhiyun					regulator-always-on;
325*4882a593Smuzhiyun					regulator-boot-on;
326*4882a593Smuzhiyun				};
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun				ldousb_reg: ldousb {
329*4882a593Smuzhiyun					/* VDDA_3V_USB: VDDA_USBHS33 */
330*4882a593Smuzhiyun					regulator-name = "ldousb";
331*4882a593Smuzhiyun					regulator-min-microvolt = <3300000>;
332*4882a593Smuzhiyun					regulator-max-microvolt = <3300000>;
333*4882a593Smuzhiyun					regulator-always-on;
334*4882a593Smuzhiyun					regulator-boot-on;
335*4882a593Smuzhiyun				};
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun				ldortc_reg: ldortc {
338*4882a593Smuzhiyun					/* VDDA_RTC  */
339*4882a593Smuzhiyun					regulator-name = "ldortc";
340*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
341*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
342*4882a593Smuzhiyun					regulator-always-on;
343*4882a593Smuzhiyun					regulator-boot-on;
344*4882a593Smuzhiyun				};
345*4882a593Smuzhiyun
346*4882a593Smuzhiyun				regen1: regen1 {
347*4882a593Smuzhiyun					/* VDD_3V3_ON */
348*4882a593Smuzhiyun					regulator-name = "regen1";
349*4882a593Smuzhiyun					regulator-boot-on;
350*4882a593Smuzhiyun					regulator-always-on;
351*4882a593Smuzhiyun				};
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun				regen2: regen2 {
354*4882a593Smuzhiyun					/* Needed for PMIC internal resource */
355*4882a593Smuzhiyun					regulator-name = "regen2";
356*4882a593Smuzhiyun					regulator-boot-on;
357*4882a593Smuzhiyun					regulator-always-on;
358*4882a593Smuzhiyun				};
359*4882a593Smuzhiyun			};
360*4882a593Smuzhiyun		};
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun		tps659038_rtc: tps659038_rtc {
363*4882a593Smuzhiyun			compatible = "ti,palmas-rtc";
364*4882a593Smuzhiyun			interrupt-parent = <&tps659038>;
365*4882a593Smuzhiyun			interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
366*4882a593Smuzhiyun			wakeup-source;
367*4882a593Smuzhiyun		};
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun		tps659038_pwr_button: tps659038_pwr_button {
370*4882a593Smuzhiyun			compatible = "ti,palmas-pwrbutton";
371*4882a593Smuzhiyun			interrupt-parent = <&tps659038>;
372*4882a593Smuzhiyun			interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
373*4882a593Smuzhiyun			wakeup-source;
374*4882a593Smuzhiyun			ti,palmas-long-press-seconds = <12>;
375*4882a593Smuzhiyun		};
376*4882a593Smuzhiyun
377*4882a593Smuzhiyun		tps659038_gpio: tps659038_gpio {
378*4882a593Smuzhiyun			compatible = "ti,palmas-gpio";
379*4882a593Smuzhiyun			gpio-controller;
380*4882a593Smuzhiyun			#gpio-cells = <2>;
381*4882a593Smuzhiyun		};
382*4882a593Smuzhiyun
383*4882a593Smuzhiyun		extcon_usb2: tps659038_usb {
384*4882a593Smuzhiyun			compatible = "ti,palmas-usb-vid";
385*4882a593Smuzhiyun			ti,enable-vbus-detection;
386*4882a593Smuzhiyun			ti,enable-id-detection;
387*4882a593Smuzhiyun			/* ID & VBUS GPIOs provided in board dts */
388*4882a593Smuzhiyun		};
389*4882a593Smuzhiyun	};
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun	tpic2810: tpic2810@60 {
392*4882a593Smuzhiyun		compatible = "ti,tpic2810";
393*4882a593Smuzhiyun		reg = <0x60>;
394*4882a593Smuzhiyun		gpio-controller;
395*4882a593Smuzhiyun		#gpio-cells = <2>;
396*4882a593Smuzhiyun	};
397*4882a593Smuzhiyun
398*4882a593Smuzhiyun	dsi_bridge: tc358778@e {
399*4882a593Smuzhiyun		compatible = "toshiba,tc358778", "toshiba,tc358768";
400*4882a593Smuzhiyun		reg = <0xe>;
401*4882a593Smuzhiyun		status = "disabled";
402*4882a593Smuzhiyun
403*4882a593Smuzhiyun		clocks = <&src_clk_x1>;
404*4882a593Smuzhiyun		clock-names = "refclk";
405*4882a593Smuzhiyun
406*4882a593Smuzhiyun		vddc-supply = <&v1_2d>;
407*4882a593Smuzhiyun		vddmipi-supply = <&v1_2d>;
408*4882a593Smuzhiyun		vddio-supply = <&v3_3d>;
409*4882a593Smuzhiyun
410*4882a593Smuzhiyun		dsi_bridge_ports: ports {
411*4882a593Smuzhiyun			#address-cells = <1>;
412*4882a593Smuzhiyun			#size-cells = <0>;
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun			port@0 {
415*4882a593Smuzhiyun				reg = <0>;
416*4882a593Smuzhiyun				rgb_in: endpoint {
417*4882a593Smuzhiyun					remote-endpoint = <&dpi_out>;
418*4882a593Smuzhiyun					data-lines = <24>;
419*4882a593Smuzhiyun				};
420*4882a593Smuzhiyun			};
421*4882a593Smuzhiyun		};
422*4882a593Smuzhiyun	};
423*4882a593Smuzhiyun};
424*4882a593Smuzhiyun
425*4882a593Smuzhiyun&mcspi3 {
426*4882a593Smuzhiyun	status = "okay";
427*4882a593Smuzhiyun	ti,pindir-d0-out-d1-in;
428*4882a593Smuzhiyun
429*4882a593Smuzhiyun	sn65hvs882: sn65hvs882@0 {
430*4882a593Smuzhiyun		compatible = "pisosr-gpio";
431*4882a593Smuzhiyun		gpio-controller;
432*4882a593Smuzhiyun		#gpio-cells = <2>;
433*4882a593Smuzhiyun
434*4882a593Smuzhiyun		reg = <0>;
435*4882a593Smuzhiyun		spi-max-frequency = <1000000>;
436*4882a593Smuzhiyun		spi-cpol;
437*4882a593Smuzhiyun	};
438*4882a593Smuzhiyun};
439*4882a593Smuzhiyun
440*4882a593Smuzhiyun&uart3 {
441*4882a593Smuzhiyun	status = "okay";
442*4882a593Smuzhiyun	interrupts-extended = <&crossbar_mpu GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH
443*4882a593Smuzhiyun			       &dra7_pmx_core 0x248>;
444*4882a593Smuzhiyun};
445*4882a593Smuzhiyun
446*4882a593Smuzhiyun&rtc {
447*4882a593Smuzhiyun	status = "okay";
448*4882a593Smuzhiyun	ext-clk-src;
449*4882a593Smuzhiyun};
450*4882a593Smuzhiyun
451*4882a593Smuzhiyun&mac_sw {
452*4882a593Smuzhiyun	status = "okay";
453*4882a593Smuzhiyun};
454*4882a593Smuzhiyun
455*4882a593Smuzhiyun&cpsw_port1 {
456*4882a593Smuzhiyun	phy-handle = <&ethphy0>;
457*4882a593Smuzhiyun	phy-mode = "rgmii-rxid";
458*4882a593Smuzhiyun	ti,dual-emac-pvid = <1>;
459*4882a593Smuzhiyun};
460*4882a593Smuzhiyun
461*4882a593Smuzhiyun&cpsw_port2 {
462*4882a593Smuzhiyun	phy-handle = <&ethphy1>;
463*4882a593Smuzhiyun	phy-mode = "rgmii-rxid";
464*4882a593Smuzhiyun	ti,dual-emac-pvid = <2>;
465*4882a593Smuzhiyun};
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun&davinci_mdio_sw {
468*4882a593Smuzhiyun	ethphy0: ethernet-phy@0 {
469*4882a593Smuzhiyun		reg = <0>;
470*4882a593Smuzhiyun	};
471*4882a593Smuzhiyun
472*4882a593Smuzhiyun	ethphy1: ethernet-phy@1 {
473*4882a593Smuzhiyun		reg = <1>;
474*4882a593Smuzhiyun	};
475*4882a593Smuzhiyun};
476*4882a593Smuzhiyun
477*4882a593Smuzhiyun&usb2_phy1 {
478*4882a593Smuzhiyun	phy-supply = <&ldousb_reg>;
479*4882a593Smuzhiyun};
480*4882a593Smuzhiyun
481*4882a593Smuzhiyun&usb2_phy2 {
482*4882a593Smuzhiyun	phy-supply = <&ldousb_reg>;
483*4882a593Smuzhiyun};
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun&usb1 {
486*4882a593Smuzhiyun	dr_mode = "host";
487*4882a593Smuzhiyun};
488*4882a593Smuzhiyun
489*4882a593Smuzhiyun&omap_dwc3_2 {
490*4882a593Smuzhiyun	extcon = <&extcon_usb2>;
491*4882a593Smuzhiyun};
492*4882a593Smuzhiyun
493*4882a593Smuzhiyun&usb2 {
494*4882a593Smuzhiyun	extcon = <&extcon_usb2>;
495*4882a593Smuzhiyun	dr_mode = "otg";
496*4882a593Smuzhiyun};
497*4882a593Smuzhiyun
498*4882a593Smuzhiyun&mmc1 {
499*4882a593Smuzhiyun	status = "okay";
500*4882a593Smuzhiyun	vmmc-supply = <&v3_3d>;
501*4882a593Smuzhiyun	vqmmc-supply = <&ldo1_reg>;
502*4882a593Smuzhiyun	bus-width = <4>;
503*4882a593Smuzhiyun	cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
504*4882a593Smuzhiyun	no-1-8-v;
505*4882a593Smuzhiyun};
506*4882a593Smuzhiyun
507*4882a593Smuzhiyun&mmc2 {
508*4882a593Smuzhiyun	status = "okay";
509*4882a593Smuzhiyun	vmmc-supply = <&v3_3d>;
510*4882a593Smuzhiyun	vqmmc-supply = <&v3_3d>;
511*4882a593Smuzhiyun	bus-width = <8>;
512*4882a593Smuzhiyun	non-removable;
513*4882a593Smuzhiyun	max-frequency = <96000000>;
514*4882a593Smuzhiyun	no-1-8-v;
515*4882a593Smuzhiyun};
516*4882a593Smuzhiyun
517*4882a593Smuzhiyun&dcan1 {
518*4882a593Smuzhiyun	status = "okay";
519*4882a593Smuzhiyun	pinctrl-names = "default", "sleep", "active";
520*4882a593Smuzhiyun	pinctrl-0 = <&dcan1_pins_sleep>;
521*4882a593Smuzhiyun	pinctrl-1 = <&dcan1_pins_sleep>;
522*4882a593Smuzhiyun	pinctrl-2 = <&dcan1_pins_default>;
523*4882a593Smuzhiyun};
524*4882a593Smuzhiyun
525*4882a593Smuzhiyun&qspi {
526*4882a593Smuzhiyun	status = "okay";
527*4882a593Smuzhiyun
528*4882a593Smuzhiyun	spi-max-frequency = <76800000>;
529*4882a593Smuzhiyun	m25p80@0 {
530*4882a593Smuzhiyun		compatible = "s25fl256s1", "jedec,spi-nor";
531*4882a593Smuzhiyun		spi-max-frequency = <76800000>;
532*4882a593Smuzhiyun		reg = <0>;
533*4882a593Smuzhiyun		spi-tx-bus-width = <1>;
534*4882a593Smuzhiyun		spi-rx-bus-width = <4>;
535*4882a593Smuzhiyun		#address-cells = <1>;
536*4882a593Smuzhiyun		#size-cells = <1>;
537*4882a593Smuzhiyun
538*4882a593Smuzhiyun		/* MTD partition table.
539*4882a593Smuzhiyun		 * The ROM checks the first four physical blocks
540*4882a593Smuzhiyun		 * for a valid file to boot and the flash here is
541*4882a593Smuzhiyun		 * 64KiB block size.
542*4882a593Smuzhiyun		 */
543*4882a593Smuzhiyun		partition@0 {
544*4882a593Smuzhiyun			label = "QSPI.SPL";
545*4882a593Smuzhiyun			reg = <0x00000000 0x000040000>;
546*4882a593Smuzhiyun		};
547*4882a593Smuzhiyun		partition@1 {
548*4882a593Smuzhiyun			label = "QSPI.u-boot";
549*4882a593Smuzhiyun			reg = <0x00040000 0x00100000>;
550*4882a593Smuzhiyun		};
551*4882a593Smuzhiyun		partition@2 {
552*4882a593Smuzhiyun			label = "QSPI.u-boot-spl-os";
553*4882a593Smuzhiyun			reg = <0x00140000 0x00080000>;
554*4882a593Smuzhiyun		};
555*4882a593Smuzhiyun		partition@3 {
556*4882a593Smuzhiyun			label = "QSPI.u-boot-env";
557*4882a593Smuzhiyun			reg = <0x001c0000 0x00010000>;
558*4882a593Smuzhiyun		};
559*4882a593Smuzhiyun		partition@4 {
560*4882a593Smuzhiyun			label = "QSPI.u-boot-env.backup1";
561*4882a593Smuzhiyun			reg = <0x001d0000 0x0010000>;
562*4882a593Smuzhiyun		};
563*4882a593Smuzhiyun		partition@5 {
564*4882a593Smuzhiyun			label = "QSPI.kernel";
565*4882a593Smuzhiyun			reg = <0x001e0000 0x0800000>;
566*4882a593Smuzhiyun		};
567*4882a593Smuzhiyun		partition@6 {
568*4882a593Smuzhiyun			label = "QSPI.file-system";
569*4882a593Smuzhiyun			reg = <0x009e0000 0x01620000>;
570*4882a593Smuzhiyun		};
571*4882a593Smuzhiyun	};
572*4882a593Smuzhiyun};
573*4882a593Smuzhiyun
574*4882a593Smuzhiyun&cpu0 {
575*4882a593Smuzhiyun	vdd-supply = <&smps12_reg>;
576*4882a593Smuzhiyun};
577*4882a593Smuzhiyun
578*4882a593Smuzhiyun&hdmi {
579*4882a593Smuzhiyun	status = "okay";
580*4882a593Smuzhiyun
581*4882a593Smuzhiyun	vdda-supply = <&ldo4_reg>;
582*4882a593Smuzhiyun
583*4882a593Smuzhiyun	port {
584*4882a593Smuzhiyun		hdmi_out: endpoint {
585*4882a593Smuzhiyun			remote-endpoint = <&tpd12s015_in>;
586*4882a593Smuzhiyun		};
587*4882a593Smuzhiyun	};
588*4882a593Smuzhiyun};
589*4882a593Smuzhiyun
590*4882a593Smuzhiyun&dss {
591*4882a593Smuzhiyun	status = "okay";
592*4882a593Smuzhiyun
593*4882a593Smuzhiyun	vdda_video-supply = <&ldoln_reg>;
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun	ports {
596*4882a593Smuzhiyun		#address-cells = <1>;
597*4882a593Smuzhiyun		#size-cells = <0>;
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun		port@0 {
600*4882a593Smuzhiyun			reg = <0>;
601*4882a593Smuzhiyun
602*4882a593Smuzhiyun			dpi_out: endpoint {
603*4882a593Smuzhiyun				remote-endpoint = <&rgb_in>;
604*4882a593Smuzhiyun				data-lines = <24>;
605*4882a593Smuzhiyun			};
606*4882a593Smuzhiyun		};
607*4882a593Smuzhiyun	};
608*4882a593Smuzhiyun};
609