xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/am5729-beagleboneai.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2014-2019 Texas Instruments Incorporated - http://www.ti.com/
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun
6*4882a593Smuzhiyun/dts-v1/;
7*4882a593Smuzhiyun
8*4882a593Smuzhiyun#include "dra74x.dtsi"
9*4882a593Smuzhiyun#include "am57xx-commercial-grade.dtsi"
10*4882a593Smuzhiyun#include "dra74x-mmc-iodelay.dtsi"
11*4882a593Smuzhiyun#include "dra74-ipu-dsp-common.dtsi"
12*4882a593Smuzhiyun#include <dt-bindings/gpio/gpio.h>
13*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
14*4882a593Smuzhiyun#include <dt-bindings/pinctrl/dra.h>
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun/ {
17*4882a593Smuzhiyun	model = "BeagleBoard.org BeagleBone AI";
18*4882a593Smuzhiyun	compatible = "beagle,am5729-beagleboneai", "ti,am5728",
19*4882a593Smuzhiyun		     "ti,dra742", "ti,dra74", "ti,dra7";
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun	aliases {
22*4882a593Smuzhiyun		rtc0 = &tps659038_rtc;
23*4882a593Smuzhiyun		rtc1 = &rtc;
24*4882a593Smuzhiyun		display0 = &hdmi_conn;
25*4882a593Smuzhiyun	};
26*4882a593Smuzhiyun
27*4882a593Smuzhiyun	chosen {
28*4882a593Smuzhiyun		stdout-path = &uart1;
29*4882a593Smuzhiyun	};
30*4882a593Smuzhiyun
31*4882a593Smuzhiyun	memory@0 {
32*4882a593Smuzhiyun		device_type = "memory";
33*4882a593Smuzhiyun		reg = <0x0 0x80000000 0x0 0x40000000>;
34*4882a593Smuzhiyun	};
35*4882a593Smuzhiyun
36*4882a593Smuzhiyun	reserved-memory {
37*4882a593Smuzhiyun		#address-cells = <2>;
38*4882a593Smuzhiyun		#size-cells = <2>;
39*4882a593Smuzhiyun		ranges;
40*4882a593Smuzhiyun
41*4882a593Smuzhiyun		ipu2_memory_region: ipu2-memory@95800000 {
42*4882a593Smuzhiyun			compatible = "shared-dma-pool";
43*4882a593Smuzhiyun			reg = <0x0 0x95800000 0x0 0x3800000>;
44*4882a593Smuzhiyun			reusable;
45*4882a593Smuzhiyun			status = "okay";
46*4882a593Smuzhiyun		};
47*4882a593Smuzhiyun
48*4882a593Smuzhiyun		dsp1_memory_region: dsp1-memory@99000000 {
49*4882a593Smuzhiyun			compatible = "shared-dma-pool";
50*4882a593Smuzhiyun			reg = <0x0 0x99000000 0x0 0x4000000>;
51*4882a593Smuzhiyun			reusable;
52*4882a593Smuzhiyun			status = "okay";
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun		ipu1_memory_region: ipu1-memory@9d000000 {
56*4882a593Smuzhiyun			compatible = "shared-dma-pool";
57*4882a593Smuzhiyun			reg = <0x0 0x9d000000 0x0 0x2000000>;
58*4882a593Smuzhiyun			reusable;
59*4882a593Smuzhiyun			status = "okay";
60*4882a593Smuzhiyun		};
61*4882a593Smuzhiyun
62*4882a593Smuzhiyun		dsp2_memory_region: dsp2-memory@9f000000 {
63*4882a593Smuzhiyun			compatible = "shared-dma-pool";
64*4882a593Smuzhiyun			reg = <0x0 0x9f000000 0x0 0x800000>;
65*4882a593Smuzhiyun			reusable;
66*4882a593Smuzhiyun			status = "okay";
67*4882a593Smuzhiyun		};
68*4882a593Smuzhiyun
69*4882a593Smuzhiyun	};
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun	vdd_adc: gpioregulator-vdd_adc {
72*4882a593Smuzhiyun		compatible = "regulator-gpio";
73*4882a593Smuzhiyun		regulator-name = "vdd_adc";
74*4882a593Smuzhiyun		vin-supply = <&vdd_5v>;
75*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
76*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
77*4882a593Smuzhiyun		regulator-always-on;
78*4882a593Smuzhiyun		regulator-boot-on;
79*4882a593Smuzhiyun		gpios = <&gpio3 27 GPIO_ACTIVE_HIGH>;
80*4882a593Smuzhiyun		states = <1800000 0
81*4882a593Smuzhiyun			3300000 1>;
82*4882a593Smuzhiyun	};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun	vdd_5v: fixedregulator-vdd_5v {
85*4882a593Smuzhiyun		compatible = "regulator-fixed";
86*4882a593Smuzhiyun		regulator-name = "vdd_5v";
87*4882a593Smuzhiyun		regulator-min-microvolt = <5000000>;
88*4882a593Smuzhiyun		regulator-max-microvolt = <5000000>;
89*4882a593Smuzhiyun		regulator-always-on;
90*4882a593Smuzhiyun		regulator-boot-on;
91*4882a593Smuzhiyun	};
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	vtt_fixed: fixedregulator-vtt {
94*4882a593Smuzhiyun		/* TPS51200 */
95*4882a593Smuzhiyun		compatible = "regulator-fixed";
96*4882a593Smuzhiyun		regulator-name = "vtt_fixed";
97*4882a593Smuzhiyun		vin-supply = <&vdd_ddr>;
98*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
99*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
100*4882a593Smuzhiyun		regulator-always-on;
101*4882a593Smuzhiyun		regulator-boot-on;
102*4882a593Smuzhiyun	};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun	leds {
105*4882a593Smuzhiyun		compatible = "gpio-leds";
106*4882a593Smuzhiyun
107*4882a593Smuzhiyun		led0 {
108*4882a593Smuzhiyun			label = "beaglebone:green:usr0";
109*4882a593Smuzhiyun			gpios = <&gpio3 17 GPIO_ACTIVE_HIGH>;
110*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
111*4882a593Smuzhiyun			default-state = "off";
112*4882a593Smuzhiyun		};
113*4882a593Smuzhiyun
114*4882a593Smuzhiyun		led1 {
115*4882a593Smuzhiyun			label = "beaglebone:green:usr1";
116*4882a593Smuzhiyun			gpios = <&gpio5 5 GPIO_ACTIVE_HIGH>;
117*4882a593Smuzhiyun			linux,default-trigger = "mmc0";
118*4882a593Smuzhiyun			default-state = "off";
119*4882a593Smuzhiyun		};
120*4882a593Smuzhiyun
121*4882a593Smuzhiyun		led2 {
122*4882a593Smuzhiyun			label = "beaglebone:green:usr2";
123*4882a593Smuzhiyun			gpios = <&gpio3 15 GPIO_ACTIVE_HIGH>;
124*4882a593Smuzhiyun			linux,default-trigger = "cpu";
125*4882a593Smuzhiyun			default-state = "off";
126*4882a593Smuzhiyun		};
127*4882a593Smuzhiyun
128*4882a593Smuzhiyun		led3 {
129*4882a593Smuzhiyun			label = "beaglebone:green:usr3";
130*4882a593Smuzhiyun			gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
131*4882a593Smuzhiyun			linux,default-trigger = "mmc1";
132*4882a593Smuzhiyun			default-state = "off";
133*4882a593Smuzhiyun		};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun		led4 {
136*4882a593Smuzhiyun			label = "beaglebone:green:usr4";
137*4882a593Smuzhiyun			gpios = <&gpio3 7 GPIO_ACTIVE_HIGH>;
138*4882a593Smuzhiyun			linux,default-trigger = "netdev";
139*4882a593Smuzhiyun			default-state = "off";
140*4882a593Smuzhiyun		};
141*4882a593Smuzhiyun	};
142*4882a593Smuzhiyun
143*4882a593Smuzhiyun	hdmi_conn: connector@0 {
144*4882a593Smuzhiyun		compatible = "hdmi-connector";
145*4882a593Smuzhiyun		label = "hdmi";
146*4882a593Smuzhiyun		type = "a";
147*4882a593Smuzhiyun
148*4882a593Smuzhiyun		port {
149*4882a593Smuzhiyun			hdmi_connector_in: endpoint {
150*4882a593Smuzhiyun				remote-endpoint = <&hdmi_encoder_out>;
151*4882a593Smuzhiyun			};
152*4882a593Smuzhiyun		};
153*4882a593Smuzhiyun	};
154*4882a593Smuzhiyun
155*4882a593Smuzhiyun	hdmi_enc: encoder@0 {
156*4882a593Smuzhiyun		/* "ti,tpd12s016" software compatible with "ti,tpd12s015"
157*4882a593Smuzhiyun		 *  no need for individual driver
158*4882a593Smuzhiyun		 */
159*4882a593Smuzhiyun		compatible = "ti,tpd12s015";
160*4882a593Smuzhiyun		gpios = <0>,
161*4882a593Smuzhiyun			<0>,
162*4882a593Smuzhiyun			<&gpio7 12 GPIO_ACTIVE_HIGH>;
163*4882a593Smuzhiyun
164*4882a593Smuzhiyun		ports {
165*4882a593Smuzhiyun			#address-cells = <0x1>;
166*4882a593Smuzhiyun			#size-cells = <0x0>;
167*4882a593Smuzhiyun
168*4882a593Smuzhiyun			port@0 {
169*4882a593Smuzhiyun				reg = <0x0>;
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun				hdmi_encoder_in: endpoint@0 {
172*4882a593Smuzhiyun					remote-endpoint = <&hdmi_out>;
173*4882a593Smuzhiyun				};
174*4882a593Smuzhiyun			};
175*4882a593Smuzhiyun
176*4882a593Smuzhiyun			port@1 {
177*4882a593Smuzhiyun				reg = <0x1>;
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun				hdmi_encoder_out: endpoint@0 {
180*4882a593Smuzhiyun					remote-endpoint = <&hdmi_connector_in>;
181*4882a593Smuzhiyun				};
182*4882a593Smuzhiyun			};
183*4882a593Smuzhiyun		};
184*4882a593Smuzhiyun	};
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun	emmc_pwrseq: emmc_pwrseq {
187*4882a593Smuzhiyun		compatible = "mmc-pwrseq-emmc";
188*4882a593Smuzhiyun		reset-gpios = <&gpio5 7 GPIO_ACTIVE_LOW>;
189*4882a593Smuzhiyun	};
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun	brcmf_pwrseq: brcmf_pwrseq {
192*4882a593Smuzhiyun		compatible = "mmc-pwrseq-simple";
193*4882a593Smuzhiyun		reset-gpios = <&gpio3 22 GPIO_ACTIVE_LOW>,	/* BT-REG-ON */
194*4882a593Smuzhiyun				<&gpio3 18 GPIO_ACTIVE_LOW>;	/* WL-REG-ON */
195*4882a593Smuzhiyun	};
196*4882a593Smuzhiyun
197*4882a593Smuzhiyun	extcon_usb1: extcon_usb1 {
198*4882a593Smuzhiyun		compatible = "linux,extcon-usb-gpio";
199*4882a593Smuzhiyun		ti,enable-id-detection;
200*4882a593Smuzhiyun		id-gpio = <&gpio3 13 GPIO_ACTIVE_HIGH>;
201*4882a593Smuzhiyun	};
202*4882a593Smuzhiyun};
203*4882a593Smuzhiyun
204*4882a593Smuzhiyun&i2c1 {
205*4882a593Smuzhiyun	status = "okay";
206*4882a593Smuzhiyun	clock-frequency = <400000>;
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun	tps659038: tps659038@58 {
209*4882a593Smuzhiyun		compatible = "ti,tps659038";
210*4882a593Smuzhiyun		reg = <0x58>;
211*4882a593Smuzhiyun		interrupt-parent = <&gpio6>;
212*4882a593Smuzhiyun		interrupts = <16 IRQ_TYPE_LEVEL_LOW>;
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun		#interrupt-cells = <2>;
215*4882a593Smuzhiyun		interrupt-controller;
216*4882a593Smuzhiyun
217*4882a593Smuzhiyun		ti,system-power-controller;
218*4882a593Smuzhiyun		ti,palmas-override-powerhold;
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun		tps659038_pmic {
221*4882a593Smuzhiyun			compatible = "ti,tps659038-pmic";
222*4882a593Smuzhiyun
223*4882a593Smuzhiyun			smps12-in-supply = <&vdd_5v>;
224*4882a593Smuzhiyun			smps3-in-supply = <&vdd_5v>;
225*4882a593Smuzhiyun			smps45-in-supply = <&vdd_5v>;
226*4882a593Smuzhiyun			smps6-in-supply = <&vdd_5v>;
227*4882a593Smuzhiyun			smps7-in-supply = <&vdd_5v>;
228*4882a593Smuzhiyun			mps3-in-supply = <&vdd_5v>;
229*4882a593Smuzhiyun			smps8-in-supply = <&vdd_5v>;
230*4882a593Smuzhiyun			smps9-in-supply = <&vdd_5v>;
231*4882a593Smuzhiyun			ldo1-in-supply = <&vdd_5v>;
232*4882a593Smuzhiyun			ldo2-in-supply = <&vdd_5v>;
233*4882a593Smuzhiyun			ldo3-in-supply = <&vdd_5v>;
234*4882a593Smuzhiyun			ldo4-in-supply = <&vdd_5v>;
235*4882a593Smuzhiyun			ldo9-in-supply = <&vdd_5v>;
236*4882a593Smuzhiyun			ldoln-in-supply = <&vdd_5v>;
237*4882a593Smuzhiyun			ldousb-in-supply = <&vdd_5v>;
238*4882a593Smuzhiyun			ldortc-in-supply = <&vdd_5v>;
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun			regulators {
241*4882a593Smuzhiyun				vdd_mpu: smps12 {
242*4882a593Smuzhiyun					/* VDD_MPU */
243*4882a593Smuzhiyun					regulator-name = "smps12";
244*4882a593Smuzhiyun					regulator-min-microvolt = <850000>;
245*4882a593Smuzhiyun					regulator-max-microvolt = <1250000>;
246*4882a593Smuzhiyun					regulator-always-on;
247*4882a593Smuzhiyun					regulator-boot-on;
248*4882a593Smuzhiyun				};
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun				vdd_ddr: smps3 {
251*4882a593Smuzhiyun					/* VDD_DDR EMIF1 EMIF2 */
252*4882a593Smuzhiyun					regulator-name = "smps3";
253*4882a593Smuzhiyun					regulator-min-microvolt = <1350000>;
254*4882a593Smuzhiyun					regulator-max-microvolt = <1350000>;
255*4882a593Smuzhiyun					regulator-always-on;
256*4882a593Smuzhiyun					regulator-boot-on;
257*4882a593Smuzhiyun				};
258*4882a593Smuzhiyun
259*4882a593Smuzhiyun				vdd_dspeve: smps45 {
260*4882a593Smuzhiyun					/* VDD_DSPEVE on AM572 */
261*4882a593Smuzhiyun					regulator-name = "smps45";
262*4882a593Smuzhiyun					regulator-min-microvolt = < 850000>;
263*4882a593Smuzhiyun					regulator-max-microvolt = <1250000>;
264*4882a593Smuzhiyun					regulator-always-on;
265*4882a593Smuzhiyun					regulator-boot-on;
266*4882a593Smuzhiyun				};
267*4882a593Smuzhiyun
268*4882a593Smuzhiyun				vdd_gpu: smps6 {
269*4882a593Smuzhiyun					/* VDD_GPU */
270*4882a593Smuzhiyun					regulator-name = "smps6";
271*4882a593Smuzhiyun					regulator-min-microvolt = < 850000>;
272*4882a593Smuzhiyun					regulator-max-microvolt = <1250000>;
273*4882a593Smuzhiyun					regulator-always-on;
274*4882a593Smuzhiyun					regulator-boot-on;
275*4882a593Smuzhiyun				};
276*4882a593Smuzhiyun
277*4882a593Smuzhiyun				vdd_core: smps7 {
278*4882a593Smuzhiyun					/* VDD_CORE */
279*4882a593Smuzhiyun					regulator-name = "smps7";
280*4882a593Smuzhiyun					regulator-min-microvolt = < 850000>;	/*** 1.15V */
281*4882a593Smuzhiyun					regulator-max-microvolt = <1150000>;
282*4882a593Smuzhiyun					regulator-always-on;
283*4882a593Smuzhiyun					regulator-boot-on;
284*4882a593Smuzhiyun				};
285*4882a593Smuzhiyun
286*4882a593Smuzhiyun				vdd_iva: smps8 {
287*4882a593Smuzhiyun					/* VDD_IVAHD */				/*** 1.06V */
288*4882a593Smuzhiyun					regulator-name = "smps8";
289*4882a593Smuzhiyun				};
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun				vdd_3v3: smps9 {
292*4882a593Smuzhiyun					/* VDD_3V3 */
293*4882a593Smuzhiyun					regulator-name = "smps9";
294*4882a593Smuzhiyun					regulator-min-microvolt = <3300000>;
295*4882a593Smuzhiyun					regulator-max-microvolt = <3300000>;
296*4882a593Smuzhiyun					regulator-always-on;
297*4882a593Smuzhiyun					regulator-boot-on;
298*4882a593Smuzhiyun				};
299*4882a593Smuzhiyun
300*4882a593Smuzhiyun				vdd_sd: ldo1 {
301*4882a593Smuzhiyun					/* VDDSHV8 - VSDMMC  */
302*4882a593Smuzhiyun					regulator-name = "ldo1";
303*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
304*4882a593Smuzhiyun					regulator-max-microvolt = <3300000>;
305*4882a593Smuzhiyun					regulator-boot-on;
306*4882a593Smuzhiyun					regulator-always-on;
307*4882a593Smuzhiyun				};
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun				vdd_1v8: ldo2 {
310*4882a593Smuzhiyun					/* VDDSH18V */
311*4882a593Smuzhiyun					regulator-name = "ldo2";
312*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
313*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
314*4882a593Smuzhiyun					regulator-always-on;
315*4882a593Smuzhiyun					regulator-boot-on;
316*4882a593Smuzhiyun				};
317*4882a593Smuzhiyun
318*4882a593Smuzhiyun				vdd_1v8_phy_ldo3: ldo3 {
319*4882a593Smuzhiyun					/* R1.3a 572x V1_8PHY_LDO3: USB, SATA */
320*4882a593Smuzhiyun					regulator-name = "ldo3";
321*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
322*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
323*4882a593Smuzhiyun					regulator-always-on;
324*4882a593Smuzhiyun					regulator-boot-on;
325*4882a593Smuzhiyun				};
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun				vdd_1v8_phy_ldo4: ldo4 {
328*4882a593Smuzhiyun					/* R1.3a 572x V1_8PHY_LDO4: PCIE, HDMI*/
329*4882a593Smuzhiyun					regulator-name = "ldo4";
330*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
331*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
332*4882a593Smuzhiyun					regulator-always-on;
333*4882a593Smuzhiyun					regulator-boot-on;
334*4882a593Smuzhiyun				};
335*4882a593Smuzhiyun
336*4882a593Smuzhiyun				/* LDO5-8 unused */
337*4882a593Smuzhiyun
338*4882a593Smuzhiyun				vdd_rtc: ldo9 {
339*4882a593Smuzhiyun					/* VDD_RTC  */
340*4882a593Smuzhiyun					regulator-name = "ldo9";
341*4882a593Smuzhiyun					regulator-min-microvolt = < 840000>;
342*4882a593Smuzhiyun					regulator-max-microvolt = <1160000>;
343*4882a593Smuzhiyun					regulator-always-on;
344*4882a593Smuzhiyun					regulator-boot-on;
345*4882a593Smuzhiyun				};
346*4882a593Smuzhiyun
347*4882a593Smuzhiyun				vdd_1v8_pll: ldoln {
348*4882a593Smuzhiyun					/* VDDA_1V8_PLL */
349*4882a593Smuzhiyun					regulator-name = "ldoln";
350*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
351*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
352*4882a593Smuzhiyun					regulator-always-on;
353*4882a593Smuzhiyun					regulator-boot-on;
354*4882a593Smuzhiyun				};
355*4882a593Smuzhiyun
356*4882a593Smuzhiyun				ldousb_reg: ldousb {
357*4882a593Smuzhiyun					/* VDDA_3V_USB: VDDA_USBHS33 */
358*4882a593Smuzhiyun					regulator-name = "ldousb";
359*4882a593Smuzhiyun					regulator-min-microvolt = <3300000>;
360*4882a593Smuzhiyun					regulator-max-microvolt = <3300000>;
361*4882a593Smuzhiyun					regulator-always-on;
362*4882a593Smuzhiyun					regulator-boot-on;
363*4882a593Smuzhiyun				};
364*4882a593Smuzhiyun
365*4882a593Smuzhiyun				ldortc_reg: ldortc {
366*4882a593Smuzhiyun					/* VDDA_RTC  */
367*4882a593Smuzhiyun					regulator-name = "ldortc";
368*4882a593Smuzhiyun					regulator-min-microvolt = <1800000>;
369*4882a593Smuzhiyun					regulator-max-microvolt = <1800000>;
370*4882a593Smuzhiyun					regulator-always-on;
371*4882a593Smuzhiyun					regulator-boot-on;
372*4882a593Smuzhiyun				};
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun				regen1: regen1 {
375*4882a593Smuzhiyun					/* VDD_3V3_ON */
376*4882a593Smuzhiyun					regulator-name = "regen1";
377*4882a593Smuzhiyun					regulator-boot-on;
378*4882a593Smuzhiyun					regulator-always-on;
379*4882a593Smuzhiyun				};
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun				regen2: regen2 {
382*4882a593Smuzhiyun					/* Needed for PMIC internal resource */
383*4882a593Smuzhiyun					regulator-name = "regen2";
384*4882a593Smuzhiyun					regulator-boot-on;
385*4882a593Smuzhiyun					regulator-always-on;
386*4882a593Smuzhiyun				};
387*4882a593Smuzhiyun			};
388*4882a593Smuzhiyun		};
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun		tps659038_rtc: tps659038_rtc {
391*4882a593Smuzhiyun			compatible = "ti,palmas-rtc";
392*4882a593Smuzhiyun			interrupt-parent = <&tps659038>;
393*4882a593Smuzhiyun			interrupts = <8 IRQ_TYPE_EDGE_FALLING>;
394*4882a593Smuzhiyun			wakeup-source;
395*4882a593Smuzhiyun		};
396*4882a593Smuzhiyun
397*4882a593Smuzhiyun		tps659038_pwr_button: tps659038_pwr_button {
398*4882a593Smuzhiyun			compatible = "ti,palmas-pwrbutton";
399*4882a593Smuzhiyun			interrupt-parent = <&tps659038>;
400*4882a593Smuzhiyun			interrupts = <1 IRQ_TYPE_EDGE_FALLING>;
401*4882a593Smuzhiyun			wakeup-source;
402*4882a593Smuzhiyun			ti,palmas-long-press-seconds = <12>;
403*4882a593Smuzhiyun		};
404*4882a593Smuzhiyun
405*4882a593Smuzhiyun		tps659038_gpio: tps659038_gpio {
406*4882a593Smuzhiyun			compatible = "ti,palmas-gpio";
407*4882a593Smuzhiyun			gpio-controller;
408*4882a593Smuzhiyun			#gpio-cells = <2>;
409*4882a593Smuzhiyun		};
410*4882a593Smuzhiyun	};
411*4882a593Smuzhiyun
412*4882a593Smuzhiyun	/* STMPE811 touch screen controller */
413*4882a593Smuzhiyun	stmpe811@41 {
414*4882a593Smuzhiyun		compatible = "st,stmpe811";
415*4882a593Smuzhiyun		reg = <0x41>;
416*4882a593Smuzhiyun		interrupts = <30 IRQ_TYPE_LEVEL_LOW>;
417*4882a593Smuzhiyun		interrupt-parent = <&gpio2>;
418*4882a593Smuzhiyun		interrupt-controller;
419*4882a593Smuzhiyun		id = <0>;
420*4882a593Smuzhiyun		blocks = <0x5>;
421*4882a593Smuzhiyun		irq-trigger = <0x1>;
422*4882a593Smuzhiyun		st,mod-12b = <1>; /* 12-bit ADC */
423*4882a593Smuzhiyun		st,ref-sel = <0>; /* internal ADC reference */
424*4882a593Smuzhiyun		st,adc-freq = <1>; /* 3.25 MHz ADC clock speed */
425*4882a593Smuzhiyun		st,sample-time = <4>; /* ADC converstion time: 80 clocks */
426*4882a593Smuzhiyun
427*4882a593Smuzhiyun		stmpe_adc {
428*4882a593Smuzhiyun			compatible = "st,stmpe-adc";
429*4882a593Smuzhiyun			st,norequest-mask = <0x00>; /* mask any channels to be used by touchscreen */
430*4882a593Smuzhiyun			adc0: iio-device@0 {
431*4882a593Smuzhiyun				#io-channel-cells = <1>;
432*4882a593Smuzhiyun				iio-channels = <&adc0 4>, <&adc0 1>, <&adc0 2>, <&adc0 3>, <&adc0 4>, <&adc0 5>, <&adc0 6>;
433*4882a593Smuzhiyun				iio-channel-names = "AIN0_P9_39", "AIN1_P9_40", "AIN2_P9_37", "AIN3_P9_38",
434*4882a593Smuzhiyun					"AIN4_P9_33", "AIN5_P9_36", "AIN6_P9_35";
435*4882a593Smuzhiyun			};
436*4882a593Smuzhiyun		};
437*4882a593Smuzhiyun
438*4882a593Smuzhiyun		stmpe_touchscreen {
439*4882a593Smuzhiyun			status = "disabled";
440*4882a593Smuzhiyun			compatible = "st,stmpe-ts";
441*4882a593Smuzhiyun			/* 8 sample average control */
442*4882a593Smuzhiyun			st,ave-ctrl = <3>;
443*4882a593Smuzhiyun			/* 7 length fractional part in z */
444*4882a593Smuzhiyun			st,fraction-z = <7>;
445*4882a593Smuzhiyun			/*
446*4882a593Smuzhiyun			 * 50 mA typical 80 mA max touchscreen drivers
447*4882a593Smuzhiyun			 * current limit value
448*4882a593Smuzhiyun			 */
449*4882a593Smuzhiyun			st,i-drive = <1>;
450*4882a593Smuzhiyun			/* 1 ms panel driver settling time */
451*4882a593Smuzhiyun			st,settling = <3>;
452*4882a593Smuzhiyun			/* 5 ms touch detect interrupt delay */
453*4882a593Smuzhiyun			st,touch-det-delay = <5>;
454*4882a593Smuzhiyun		};
455*4882a593Smuzhiyun
456*4882a593Smuzhiyun		stmpe_gpio {
457*4882a593Smuzhiyun			compatible = "st,stmpe-gpio";
458*4882a593Smuzhiyun		};
459*4882a593Smuzhiyun
460*4882a593Smuzhiyun		stmpe_pwm {
461*4882a593Smuzhiyun			compatible = "st,stmpe-pwm";
462*4882a593Smuzhiyun			#pwm-cells = <2>;
463*4882a593Smuzhiyun		};
464*4882a593Smuzhiyun	};
465*4882a593Smuzhiyun};
466*4882a593Smuzhiyun
467*4882a593Smuzhiyun&mcspi3 {
468*4882a593Smuzhiyun	status = "okay";
469*4882a593Smuzhiyun	ti,pindir-d0-out-d1-in;
470*4882a593Smuzhiyun
471*4882a593Smuzhiyun	sn65hvs882: sn65hvs882@0 {
472*4882a593Smuzhiyun		compatible = "pisosr-gpio";
473*4882a593Smuzhiyun		gpio-controller;
474*4882a593Smuzhiyun		#gpio-cells = <2>;
475*4882a593Smuzhiyun
476*4882a593Smuzhiyun		reg = <0>;
477*4882a593Smuzhiyun		spi-max-frequency = <1000000>;
478*4882a593Smuzhiyun		spi-cpol;
479*4882a593Smuzhiyun	};
480*4882a593Smuzhiyun};
481*4882a593Smuzhiyun
482*4882a593Smuzhiyun&cpu0 {
483*4882a593Smuzhiyun	vdd-supply = <&vdd_mpu>;
484*4882a593Smuzhiyun	voltage-tolerance = <1>;
485*4882a593Smuzhiyun};
486*4882a593Smuzhiyun
487*4882a593Smuzhiyun&uart1 {
488*4882a593Smuzhiyun	status = "okay";
489*4882a593Smuzhiyun};
490*4882a593Smuzhiyun
491*4882a593Smuzhiyun&davinci_mdio_sw {
492*4882a593Smuzhiyun	reset-gpios = <&gpio2 23 GPIO_ACTIVE_LOW>;
493*4882a593Smuzhiyun	reset-delay-us = <2>;
494*4882a593Smuzhiyun
495*4882a593Smuzhiyun	phy0: ethernet-phy@4 {
496*4882a593Smuzhiyun		reg = <4>;
497*4882a593Smuzhiyun		eee-broken-100tx;
498*4882a593Smuzhiyun		eee-broken-1000t;
499*4882a593Smuzhiyun	};
500*4882a593Smuzhiyun};
501*4882a593Smuzhiyun
502*4882a593Smuzhiyun&mac_sw {
503*4882a593Smuzhiyun	status = "okay";
504*4882a593Smuzhiyun};
505*4882a593Smuzhiyun
506*4882a593Smuzhiyun&cpsw_port1 {
507*4882a593Smuzhiyun	phy-handle = <&phy0>;
508*4882a593Smuzhiyun	phy-mode = "rgmii-rxid";
509*4882a593Smuzhiyun	ti,dual-emac-pvid = <1>;
510*4882a593Smuzhiyun};
511*4882a593Smuzhiyun
512*4882a593Smuzhiyun&cpsw_port2 {
513*4882a593Smuzhiyun	status = "disabled";
514*4882a593Smuzhiyun};
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun&ocp {
517*4882a593Smuzhiyun	pruss1_shmem: pruss_shmem@4b200000 {
518*4882a593Smuzhiyun		status = "okay";
519*4882a593Smuzhiyun		compatible = "ti,pruss-shmem";
520*4882a593Smuzhiyun		reg = <0x4b200000 0x020000>;
521*4882a593Smuzhiyun	};
522*4882a593Smuzhiyun
523*4882a593Smuzhiyun	pruss2_shmem: pruss_shmem@4b280000 {
524*4882a593Smuzhiyun		status = "okay";
525*4882a593Smuzhiyun		compatible = "ti,pruss-shmem";
526*4882a593Smuzhiyun		reg = <0x4b280000 0x020000>;
527*4882a593Smuzhiyun	};
528*4882a593Smuzhiyun};
529*4882a593Smuzhiyun
530*4882a593Smuzhiyun&mmc1 {
531*4882a593Smuzhiyun	status = "okay";
532*4882a593Smuzhiyun	vmmc-supply = <&vdd_3v3>;
533*4882a593Smuzhiyun	vqmmc-supply = <&vdd_sd>;
534*4882a593Smuzhiyun	bus-width = <4>;
535*4882a593Smuzhiyun	cd-gpios = <&gpio6 27 GPIO_ACTIVE_LOW>; /* gpio 219 */
536*4882a593Smuzhiyun
537*4882a593Smuzhiyun	pinctrl-names = "default";
538*4882a593Smuzhiyun	pinctrl-0 = <&mmc1_pins_default>;
539*4882a593Smuzhiyun};
540*4882a593Smuzhiyun
541*4882a593Smuzhiyun&mmc2 {
542*4882a593Smuzhiyun	status = "okay";
543*4882a593Smuzhiyun	vmmc-supply = <&vdd_1v8>;
544*4882a593Smuzhiyun	vqmmc-supply = <&vdd_1v8>;
545*4882a593Smuzhiyun	bus-width = <8>;
546*4882a593Smuzhiyun	ti,non-removable;
547*4882a593Smuzhiyun	non-removable;
548*4882a593Smuzhiyun	mmc-pwrseq = <&emmc_pwrseq>;
549*4882a593Smuzhiyun
550*4882a593Smuzhiyun	ti,needs-special-reset;
551*4882a593Smuzhiyun	dmas = <&sdma_xbar 47>, <&sdma_xbar 48>;
552*4882a593Smuzhiyun	dma-names = "tx", "rx";
553*4882a593Smuzhiyun
554*4882a593Smuzhiyun};
555*4882a593Smuzhiyun
556*4882a593Smuzhiyun&mmc4 {
557*4882a593Smuzhiyun	/* DS: Default speed (DS) up to 25 MHz, including 1- and 4-bit modes (3.3 V signaling). */
558*4882a593Smuzhiyun	/* HS: High speed up to 50 MHz (3.3 V signaling). */
559*4882a593Smuzhiyun	/* SDR12: SDR up to 25 MHz (1.8 V signaling). */
560*4882a593Smuzhiyun	/* SDR25: SDR up to 50 MHz (1.8 V signaling). */
561*4882a593Smuzhiyun	/* SDR50: SDR up to 100 MHz (1.8 V signaling). */
562*4882a593Smuzhiyun	/* SDR104: SDR up to 208 MHz (1.8 V signaling) */
563*4882a593Smuzhiyun	/* DDR50: DDR up to 50 MHz (1.8 V signaling). */
564*4882a593Smuzhiyun	status = "okay";
565*4882a593Smuzhiyun
566*4882a593Smuzhiyun	ti,needs-special-reset;
567*4882a593Smuzhiyun	vmmc-supply = <&vdd_3v3>;
568*4882a593Smuzhiyun	cap-power-off-card;
569*4882a593Smuzhiyun	keep-power-in-suspend;
570*4882a593Smuzhiyun	bus-width = <4>;
571*4882a593Smuzhiyun	ti,non-removable;
572*4882a593Smuzhiyun	non-removable;
573*4882a593Smuzhiyun	no-1-8-v;
574*4882a593Smuzhiyun	max-frequency = <24000000>;
575*4882a593Smuzhiyun
576*4882a593Smuzhiyun	#address-cells = <1>;
577*4882a593Smuzhiyun	#size-cells = <0>;
578*4882a593Smuzhiyun	mmc-pwrseq = <&brcmf_pwrseq>;
579*4882a593Smuzhiyun
580*4882a593Smuzhiyun	brcmf: wifi@1 {
581*4882a593Smuzhiyun		status = "okay";
582*4882a593Smuzhiyun		reg = <1>;
583*4882a593Smuzhiyun		compatible = "brcm,bcm4329-fmac";
584*4882a593Smuzhiyun
585*4882a593Smuzhiyun		brcm,sd-head-align = <4>;
586*4882a593Smuzhiyun		brcm,sd_head_align = <4>;
587*4882a593Smuzhiyun		brcm,sd_sgentry_align = <512>;
588*4882a593Smuzhiyun
589*4882a593Smuzhiyun		interrupt-parent = <&gpio3>;
590*4882a593Smuzhiyun		interrupts = <23 IRQ_TYPE_LEVEL_LOW>;
591*4882a593Smuzhiyun		interrupt-names = "host-wake";
592*4882a593Smuzhiyun	};
593*4882a593Smuzhiyun};
594*4882a593Smuzhiyun
595*4882a593Smuzhiyun&usb2_phy1 {
596*4882a593Smuzhiyun	phy-supply = <&ldousb_reg>;
597*4882a593Smuzhiyun};
598*4882a593Smuzhiyun
599*4882a593Smuzhiyun&usb2_phy2 {
600*4882a593Smuzhiyun	phy-supply = <&ldousb_reg>;
601*4882a593Smuzhiyun};
602*4882a593Smuzhiyun
603*4882a593Smuzhiyun&usb1 {
604*4882a593Smuzhiyun	status = "okay";
605*4882a593Smuzhiyun	dr_mode = "otg";
606*4882a593Smuzhiyun};
607*4882a593Smuzhiyun
608*4882a593Smuzhiyun&omap_dwc3_1 {
609*4882a593Smuzhiyun	extcon = <&extcon_usb1>;
610*4882a593Smuzhiyun};
611*4882a593Smuzhiyun
612*4882a593Smuzhiyun&usb2 {
613*4882a593Smuzhiyun	status = "okay";
614*4882a593Smuzhiyun	dr_mode = "host";
615*4882a593Smuzhiyun};
616*4882a593Smuzhiyun
617*4882a593Smuzhiyun&dss {
618*4882a593Smuzhiyun	status = "okay";
619*4882a593Smuzhiyun	vdda_video-supply = <&vdd_1v8_pll>;
620*4882a593Smuzhiyun};
621*4882a593Smuzhiyun
622*4882a593Smuzhiyun&hdmi {
623*4882a593Smuzhiyun	status = "okay";
624*4882a593Smuzhiyun	vdda-supply = <&vdd_1v8_phy_ldo4>;
625*4882a593Smuzhiyun
626*4882a593Smuzhiyun	port {
627*4882a593Smuzhiyun		hdmi_out: endpoint {
628*4882a593Smuzhiyun			remote-endpoint = <&hdmi_encoder_in>;
629*4882a593Smuzhiyun		};
630*4882a593Smuzhiyun	};
631*4882a593Smuzhiyun};
632*4882a593Smuzhiyun
633*4882a593Smuzhiyun&bandgap {
634*4882a593Smuzhiyun	status = "okay";
635*4882a593Smuzhiyun};
636*4882a593Smuzhiyun
637*4882a593Smuzhiyun&cpu_alert0 {
638*4882a593Smuzhiyun	temperature = <55000>; /* milliCelsius */
639*4882a593Smuzhiyun};
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun&cpu_crit {
642*4882a593Smuzhiyun	temperature = <85000>; /* milliCelsius */
643*4882a593Smuzhiyun};
644*4882a593Smuzhiyun
645*4882a593Smuzhiyun&gpu_crit {
646*4882a593Smuzhiyun	temperature = <85000>; /* milliCelsius */
647*4882a593Smuzhiyun};
648*4882a593Smuzhiyun
649*4882a593Smuzhiyun&core_crit {
650*4882a593Smuzhiyun	temperature = <85000>; /* milliCelsius */
651*4882a593Smuzhiyun};
652*4882a593Smuzhiyun
653*4882a593Smuzhiyun&dspeve_crit {
654*4882a593Smuzhiyun	temperature = <85000>; /* milliCelsius */
655*4882a593Smuzhiyun};
656*4882a593Smuzhiyun
657*4882a593Smuzhiyun&iva_crit {
658*4882a593Smuzhiyun	temperature = <85000>; /* milliCelsius */
659*4882a593Smuzhiyun};
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun&sata {
662*4882a593Smuzhiyun	status = "disabled";
663*4882a593Smuzhiyun};
664*4882a593Smuzhiyun
665*4882a593Smuzhiyun&sata_phy {
666*4882a593Smuzhiyun	status = "disabled";
667*4882a593Smuzhiyun};
668*4882a593Smuzhiyun
669*4882a593Smuzhiyun/* bluetooth */
670*4882a593Smuzhiyun&uart6 {
671*4882a593Smuzhiyun	status = "okay";
672*4882a593Smuzhiyun};
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun/* cape header stuff */
675*4882a593Smuzhiyun&i2c4 {
676*4882a593Smuzhiyun	status = "okay";
677*4882a593Smuzhiyun	clock-frequency = <100000>;
678*4882a593Smuzhiyun};
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun&cpu0_opp_table {
681*4882a593Smuzhiyun	opp_slow-500000000 {
682*4882a593Smuzhiyun		opp-shared;
683*4882a593Smuzhiyun	};
684*4882a593Smuzhiyun};
685*4882a593Smuzhiyun
686*4882a593Smuzhiyun&ipu2 {
687*4882a593Smuzhiyun	status = "okay";
688*4882a593Smuzhiyun	memory-region = <&ipu2_memory_region>;
689*4882a593Smuzhiyun};
690*4882a593Smuzhiyun
691*4882a593Smuzhiyun&ipu1 {
692*4882a593Smuzhiyun	status = "okay";
693*4882a593Smuzhiyun	memory-region = <&ipu1_memory_region>;
694*4882a593Smuzhiyun};
695*4882a593Smuzhiyun
696*4882a593Smuzhiyun&dsp1 {
697*4882a593Smuzhiyun	status = "okay";
698*4882a593Smuzhiyun	memory-region = <&dsp1_memory_region>;
699*4882a593Smuzhiyun};
700*4882a593Smuzhiyun
701*4882a593Smuzhiyun&dsp2 {
702*4882a593Smuzhiyun	status = "okay";
703*4882a593Smuzhiyun	memory-region = <&dsp2_memory_region>;
704*4882a593Smuzhiyun};
705