1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2011 Texas Instruments Incorporated - https://www.ti.com/ 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun/dts-v1/; 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun#include "am3517.dtsi" 8*4882a593Smuzhiyun#include "am3517-som.dtsi" 9*4882a593Smuzhiyun#include "am3517-evm-ui.dtsi" 10*4882a593Smuzhiyun#include <dt-bindings/input/input.h> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun/ { 13*4882a593Smuzhiyun model = "TI AM3517 EVM (AM3517/05 TMDSEVM3517)"; 14*4882a593Smuzhiyun compatible = "ti,am3517-evm", "ti,am3517", "ti,omap3"; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun aliases { 17*4882a593Smuzhiyun display0 = &lcd0; 18*4882a593Smuzhiyun }; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun chosen { 21*4882a593Smuzhiyun stdout-path = &uart3; 22*4882a593Smuzhiyun }; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun memory@80000000 { 25*4882a593Smuzhiyun device_type = "memory"; 26*4882a593Smuzhiyun reg = <0x80000000 0x10000000>; /* 256 MB */ 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun vmmc_fixed: vmmc { 30*4882a593Smuzhiyun compatible = "regulator-fixed"; 31*4882a593Smuzhiyun regulator-name = "vmmc_fixed"; 32*4882a593Smuzhiyun regulator-min-microvolt = <3300000>; 33*4882a593Smuzhiyun regulator-max-microvolt = <3300000>; 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun gpio-keys { 37*4882a593Smuzhiyun compatible = "gpio-keys-polled"; 38*4882a593Smuzhiyun poll-interval = <100>; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun user_pb { 41*4882a593Smuzhiyun label = "User Push Button"; 42*4882a593Smuzhiyun linux,code = <BTN_0>; 43*4882a593Smuzhiyun gpios = <&tca6416 5 GPIO_ACTIVE_LOW>; 44*4882a593Smuzhiyun }; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun user_sw_1 { 47*4882a593Smuzhiyun label = "User Switch 1"; 48*4882a593Smuzhiyun linux,code = <BTN_1>; 49*4882a593Smuzhiyun gpios = <&tca6416 8 GPIO_ACTIVE_LOW>; 50*4882a593Smuzhiyun }; 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun user_sw_2 { 53*4882a593Smuzhiyun label = "User Switch 2"; 54*4882a593Smuzhiyun linux,code = <BTN_2>; 55*4882a593Smuzhiyun gpios = <&tca6416 9 GPIO_ACTIVE_LOW>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun user_sw_3 { 59*4882a593Smuzhiyun label = "User Switch 3"; 60*4882a593Smuzhiyun linux,code = <BTN_3>; 61*4882a593Smuzhiyun gpios = <&tca6416 10 GPIO_ACTIVE_LOW>; 62*4882a593Smuzhiyun }; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun user_sw_4 { 65*4882a593Smuzhiyun label = "User Switch 4"; 66*4882a593Smuzhiyun linux,code = <BTN_4>; 67*4882a593Smuzhiyun gpios = <&tca6416 11 GPIO_ACTIVE_LOW>; 68*4882a593Smuzhiyun }; 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun user_sw_5 { 71*4882a593Smuzhiyun label = "User Switch 5"; 72*4882a593Smuzhiyun linux,code = <BTN_5>; 73*4882a593Smuzhiyun gpios = <&tca6416 12 GPIO_ACTIVE_LOW>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun user_sw_6 { 77*4882a593Smuzhiyun label = "User Switch 6"; 78*4882a593Smuzhiyun linux,code = <BTN_6>; 79*4882a593Smuzhiyun gpios = <&tca6416 13 GPIO_ACTIVE_LOW>; 80*4882a593Smuzhiyun }; 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun user_sw_7 { 83*4882a593Smuzhiyun label = "User Switch 7"; 84*4882a593Smuzhiyun linux,code = <BTN_7>; 85*4882a593Smuzhiyun gpios = <&tca6416 14 GPIO_ACTIVE_LOW>; 86*4882a593Smuzhiyun }; 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun user_sw_8 { 89*4882a593Smuzhiyun label = "User Switch 8"; 90*4882a593Smuzhiyun linux,code = <BTN_8>; 91*4882a593Smuzhiyun gpios = <&tca6416 15 GPIO_ACTIVE_LOW>; 92*4882a593Smuzhiyun }; 93*4882a593Smuzhiyun }; 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun gpio-leds { 96*4882a593Smuzhiyun compatible = "gpio-leds"; 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun pinctrl-names = "default"; 99*4882a593Smuzhiyun pinctrl-0 = <&leds_pins>; 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun user_led_1 { 102*4882a593Smuzhiyun label = "am3517evm:green:user_led_1"; 103*4882a593Smuzhiyun gpios = <&tca6416 7 GPIO_ACTIVE_LOW>; 104*4882a593Smuzhiyun default-state = "on"; 105*4882a593Smuzhiyun }; 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun user_led_2 { 108*4882a593Smuzhiyun label = "am3517evm:green:user_led_2"; 109*4882a593Smuzhiyun gpios = <&tca6416 6 GPIO_ACTIVE_LOW>; 110*4882a593Smuzhiyun default-state = "on"; 111*4882a593Smuzhiyun }; 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun user_led_3 { 114*4882a593Smuzhiyun label = "am3517evm:green:user_led_3"; 115*4882a593Smuzhiyun gpios = <&gpio1 11 GPIO_ACTIVE_HIGH>; 116*4882a593Smuzhiyun linux,default-trigger = "mmc0"; /* SD/MMC card activity */ 117*4882a593Smuzhiyun }; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun user_led_4 { 120*4882a593Smuzhiyun label = "am3517evm:green:user_led_4"; 121*4882a593Smuzhiyun gpios = <&gpio1 31 GPIO_ACTIVE_HIGH>; 122*4882a593Smuzhiyun linux,default-trigger = "heartbeat"; 123*4882a593Smuzhiyun }; 124*4882a593Smuzhiyun }; 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun lcd0: display@0 { 127*4882a593Smuzhiyun /* This isn't the exact LCD, but the timings meet spec */ 128*4882a593Smuzhiyun /* To make it work, set CONFIG_OMAP2_DSS_MIN_FCK_PER_PCK=4 */ 129*4882a593Smuzhiyun compatible = "newhaven,nhd-4.3-480272ef-atxl"; 130*4882a593Smuzhiyun label = "15"; 131*4882a593Smuzhiyun backlight = <&bl>; 132*4882a593Smuzhiyun enable-gpios = <&gpio6 16 GPIO_ACTIVE_HIGH>; /* gpio176, lcd INI */ 133*4882a593Smuzhiyun vcc-supply = <&vdd_io_reg>; 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun port { 136*4882a593Smuzhiyun lcd_in: endpoint { 137*4882a593Smuzhiyun remote-endpoint = <&dpi_out>; 138*4882a593Smuzhiyun }; 139*4882a593Smuzhiyun }; 140*4882a593Smuzhiyun }; 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun bl: backlight { 143*4882a593Smuzhiyun compatible = "pwm-backlight"; 144*4882a593Smuzhiyun pinctrl-names = "default"; 145*4882a593Smuzhiyun power-supply = <&vdd_io_reg>; 146*4882a593Smuzhiyun pinctrl-0 = <&backlight_pins>; 147*4882a593Smuzhiyun pwms = <&pwm11 0 5000000 0>; 148*4882a593Smuzhiyun brightness-levels = <0 10 20 30 40 50 60 70 80 90 100>; 149*4882a593Smuzhiyun default-brightness-level = <7>; 150*4882a593Smuzhiyun enable-gpios = <&gpio6 22 GPIO_ACTIVE_HIGH>; /* gpio_182 */ 151*4882a593Smuzhiyun }; 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun pwm11: dmtimer-pwm@11 { 154*4882a593Smuzhiyun compatible = "ti,omap-dmtimer-pwm"; 155*4882a593Smuzhiyun pinctrl-names = "default"; 156*4882a593Smuzhiyun pinctrl-0 = <&pwm_pins>; 157*4882a593Smuzhiyun ti,timers = <&timer11>; 158*4882a593Smuzhiyun #pwm-cells = <3>; 159*4882a593Smuzhiyun ti,clock-source = <0x01>; 160*4882a593Smuzhiyun }; 161*4882a593Smuzhiyun 162*4882a593Smuzhiyun /* HS USB Host PHY on PORT 1 */ 163*4882a593Smuzhiyun hsusb1_phy: hsusb1_phy { 164*4882a593Smuzhiyun pinctrl-names = "default"; 165*4882a593Smuzhiyun pinctrl-0 = <&hsusb1_rst_pins>; 166*4882a593Smuzhiyun compatible = "usb-nop-xceiv"; 167*4882a593Smuzhiyun reset-gpios = <&gpio2 25 GPIO_ACTIVE_LOW>; /* gpio_57 */ 168*4882a593Smuzhiyun #phy-cells = <0>; 169*4882a593Smuzhiyun }; 170*4882a593Smuzhiyun}; 171*4882a593Smuzhiyun 172*4882a593Smuzhiyun&davinci_emac { 173*4882a593Smuzhiyun pinctrl-names = "default"; 174*4882a593Smuzhiyun pinctrl-0 = <ðernet_pins>; 175*4882a593Smuzhiyun status = "okay"; 176*4882a593Smuzhiyun}; 177*4882a593Smuzhiyun 178*4882a593Smuzhiyun&davinci_mdio { 179*4882a593Smuzhiyun status = "okay"; 180*4882a593Smuzhiyun}; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun&dss { 183*4882a593Smuzhiyun status = "okay"; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun pinctrl-names = "default"; 186*4882a593Smuzhiyun pinctrl-0 = <&dss_dpi_pins>; 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun vdds_dsi-supply = <&vdd_io_reg>; 189*4882a593Smuzhiyun vdda_video-supply = <&vdd_io_reg>; 190*4882a593Smuzhiyun 191*4882a593Smuzhiyun port { 192*4882a593Smuzhiyun dpi_out: endpoint { 193*4882a593Smuzhiyun remote-endpoint = <&lcd_in>; 194*4882a593Smuzhiyun data-lines = <16>; 195*4882a593Smuzhiyun }; 196*4882a593Smuzhiyun }; 197*4882a593Smuzhiyun}; 198*4882a593Smuzhiyun 199*4882a593Smuzhiyun&i2c2 { 200*4882a593Smuzhiyun pinctrl-names = "default"; 201*4882a593Smuzhiyun pinctrl-0 = <&i2c2_pins>; 202*4882a593Smuzhiyun clock-frequency = <400000>; 203*4882a593Smuzhiyun /* User DIP swithes [1:8] / User LEDS [1:2] */ 204*4882a593Smuzhiyun tca6416: gpio@21 { 205*4882a593Smuzhiyun compatible = "ti,tca6416"; 206*4882a593Smuzhiyun reg = <0x21>; 207*4882a593Smuzhiyun gpio-controller; 208*4882a593Smuzhiyun #gpio-cells = <2>; 209*4882a593Smuzhiyun vcc-supply = <&vdd_io_reg>; 210*4882a593Smuzhiyun }; 211*4882a593Smuzhiyun}; 212*4882a593Smuzhiyun 213*4882a593Smuzhiyun&i2c3 { 214*4882a593Smuzhiyun pinctrl-names = "default"; 215*4882a593Smuzhiyun pinctrl-0 = <&i2c3_pins>; 216*4882a593Smuzhiyun clock-frequency = <400000>; 217*4882a593Smuzhiyun}; 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun&mmc1 { 220*4882a593Smuzhiyun status = "okay"; 221*4882a593Smuzhiyun pinctrl-names = "default"; 222*4882a593Smuzhiyun pinctrl-0 = <&mmc1_pins>; 223*4882a593Smuzhiyun vmmc-supply = <&vmmc_fixed>; 224*4882a593Smuzhiyun bus-width = <4>; 225*4882a593Smuzhiyun wp-gpios = <&gpio4 30 GPIO_ACTIVE_HIGH>; /* gpio_126 */ 226*4882a593Smuzhiyun cd-gpios = <&gpio4 31 GPIO_ACTIVE_LOW>; /* gpio_127 */ 227*4882a593Smuzhiyun}; 228*4882a593Smuzhiyun 229*4882a593Smuzhiyun&mmc3 { 230*4882a593Smuzhiyun status = "disabled"; 231*4882a593Smuzhiyun}; 232*4882a593Smuzhiyun 233*4882a593Smuzhiyun&usbhshost { 234*4882a593Smuzhiyun pinctrl-names = "default"; 235*4882a593Smuzhiyun pinctrl-0 = <&hsusb1_pins>; 236*4882a593Smuzhiyun port1-mode = "ehci-phy"; 237*4882a593Smuzhiyun}; 238*4882a593Smuzhiyun 239*4882a593Smuzhiyun&usbhsehci { 240*4882a593Smuzhiyun phys = <&hsusb1_phy>; 241*4882a593Smuzhiyun}; 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun&omap3_pmx_core { 244*4882a593Smuzhiyun 245*4882a593Smuzhiyun ethernet_pins: pinmux_ethernet_pins { 246*4882a593Smuzhiyun pinctrl-single,pins = < 247*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21fe, PIN_INPUT | MUX_MODE0) /* rmii_mdio_data */ 248*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2200, MUX_MODE0) /* rmii_mdio_clk */ 249*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2202, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd0 */ 250*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2204, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_rxd1 */ 251*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2206, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_crs_dv */ 252*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2208, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_rxer */ 253*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x220a, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd0 */ 254*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x220c, PIN_OUTPUT_PULLDOWN | MUX_MODE0) /* rmii_txd1 */ 255*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x220e, PIN_OUTPUT_PULLDOWN |MUX_MODE0) /* rmii_txen */ 256*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2210, PIN_INPUT_PULLDOWN | MUX_MODE0) /* rmii_50mhz_clk */ 257*4882a593Smuzhiyun >; 258*4882a593Smuzhiyun }; 259*4882a593Smuzhiyun 260*4882a593Smuzhiyun i2c2_pins: pinmux_i2c2_pins { 261*4882a593Smuzhiyun pinctrl-single,pins = < 262*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21be, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_scl */ 263*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21c0, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c2_sda */ 264*4882a593Smuzhiyun >; 265*4882a593Smuzhiyun }; 266*4882a593Smuzhiyun 267*4882a593Smuzhiyun i2c3_pins: pinmux_i2c3_pins { 268*4882a593Smuzhiyun pinctrl-single,pins = < 269*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21c2, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_scl */ 270*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21c4, PIN_INPUT_PULLUP | MUX_MODE0) /* i2c3_sda */ 271*4882a593Smuzhiyun >; 272*4882a593Smuzhiyun }; 273*4882a593Smuzhiyun 274*4882a593Smuzhiyun leds_pins: pinmux_leds_pins { 275*4882a593Smuzhiyun pinctrl-single,pins = < 276*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a24, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu0.gpio_11 */ 277*4882a593Smuzhiyun OMAP3_WKUP_IOPAD(0x2a26, PIN_OUTPUT_PULLUP | MUX_MODE4) /* jtag_emu1.gpio_31 */ 278*4882a593Smuzhiyun >; 279*4882a593Smuzhiyun }; 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun mmc1_pins: pinmux_mmc1_pins { 282*4882a593Smuzhiyun pinctrl-single,pins = < 283*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2144, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_clk.sdmmc1_clk */ 284*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2146, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_cmd.sdmmc1_cmd */ 285*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2148, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat0.sdmmc1_dat0 */ 286*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214a, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat1.sdmmc1_dat1 */ 287*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214c, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat2.sdmmc1_dat2 */ 288*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x214e, PIN_INPUT_PULLUP | MUX_MODE0) /* sdmmc1_dat3.sdmmc1_dat3 */ 289*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2150, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat4.gpio_126 */ 290*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x2152, PIN_INPUT_PULLUP | MUX_MODE4) /* sdmmc1_dat5.gpio_127 */ 291*4882a593Smuzhiyun >; 292*4882a593Smuzhiyun }; 293*4882a593Smuzhiyun 294*4882a593Smuzhiyun pwm_pins: pinmux_pwm_pins { 295*4882a593Smuzhiyun pinctrl-single,pins = < 296*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21dc, PIN_OUTPUT | MUX_MODE1) /* mcspi2_cs0.gpt11_pwm */ 297*4882a593Smuzhiyun >; 298*4882a593Smuzhiyun }; 299*4882a593Smuzhiyun 300*4882a593Smuzhiyun backlight_pins: pinmux_backlight_pins { 301*4882a593Smuzhiyun pinctrl-single,pins = < 302*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21de, PIN_OUTPUT | MUX_MODE4) /* mcspi2_cs1.gpio_182 */ 303*4882a593Smuzhiyun >; 304*4882a593Smuzhiyun }; 305*4882a593Smuzhiyun 306*4882a593Smuzhiyun dss_dpi_pins: pinmux_dss_dpi_pins { 307*4882a593Smuzhiyun pinctrl-single,pins = < 308*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x21d2, PIN_OUTPUT | MUX_MODE4) /* mcspi1_cs2.gpio_176 */ 309*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d4, PIN_OUTPUT | MUX_MODE0) /* dss_pclk.dss_pclk */ 310*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d6, PIN_OUTPUT | MUX_MODE0) /* dss_hsync.dss_hsync */ 311*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20d8, PIN_OUTPUT | MUX_MODE0) /* dss_vsync.dss_vsync */ 312*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20da, PIN_OUTPUT | MUX_MODE0) /* dss_acbias.dss_acbias */ 313*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20dc, PIN_OUTPUT | MUX_MODE0) /* dss_data0.dss_data0 */ 314*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20de, PIN_OUTPUT | MUX_MODE0) /* dss_data1.dss_data1 */ 315*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e0, PIN_OUTPUT | MUX_MODE0) /* dss_data2.dss_data2 */ 316*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e2, PIN_OUTPUT | MUX_MODE0) /* dss_data3.dss_data3 */ 317*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e4, PIN_OUTPUT | MUX_MODE0) /* dss_data4.dss_data4 */ 318*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e6, PIN_OUTPUT | MUX_MODE0) /* dss_data5.dss_data5 */ 319*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20e8, PIN_OUTPUT | MUX_MODE0) /* dss_data6.dss_data6 */ 320*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ea, PIN_OUTPUT | MUX_MODE0) /* dss_data7.dss_data7 */ 321*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ec, PIN_OUTPUT | MUX_MODE0) /* dss_data8.dss_data8 */ 322*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ee, PIN_OUTPUT | MUX_MODE0) /* dss_data9.dss_data9 */ 323*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f0, PIN_OUTPUT | MUX_MODE0) /* dss_data10.dss_data10 */ 324*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f2, PIN_OUTPUT | MUX_MODE0) /* dss_data11.dss_data11 */ 325*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f4, PIN_OUTPUT | MUX_MODE0) /* dss_data12.dss_data12 */ 326*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f6, PIN_OUTPUT | MUX_MODE0) /* dss_data13.dss_data13 */ 327*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20f8, PIN_OUTPUT | MUX_MODE0) /* dss_data14.dss_data14 */ 328*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20fa, PIN_OUTPUT | MUX_MODE0) /* dss_data15.dss_data15 */ 329*4882a593Smuzhiyun >; 330*4882a593Smuzhiyun }; 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun hsusb1_rst_pins: pinmux_hsusb1_rst_pins { 333*4882a593Smuzhiyun pinctrl-single,pins = < 334*4882a593Smuzhiyun OMAP3_CORE1_IOPAD(0x20ba, PIN_OUTPUT | MUX_MODE4) /* gpmc_ncs6.gpio_57 */ 335*4882a593Smuzhiyun >; 336*4882a593Smuzhiyun }; 337*4882a593Smuzhiyun}; 338*4882a593Smuzhiyun 339*4882a593Smuzhiyun&omap3_pmx_core2 { 340*4882a593Smuzhiyun 341*4882a593Smuzhiyun hsusb1_pins: pinmux_hsusb1_pins { 342*4882a593Smuzhiyun pinctrl-single,pins = < 343*4882a593Smuzhiyun OMAP3430_CORE2_IOPAD(0x25d8, PIN_OUTPUT | MUX_MODE3) /* etk_clk.hsusb1_stp */ 344*4882a593Smuzhiyun OMAP3430_CORE2_IOPAD(0x25da, PIN_OUTPUT | MUX_MODE3) /* etk_ctl.hsusb1_clk */ 345*4882a593Smuzhiyun OMAP3430_CORE2_IOPAD(0x25ec, PIN_INPUT | MUX_MODE3) /* etk_d8.hsusb1_dir */ 346*4882a593Smuzhiyun OMAP3430_CORE2_IOPAD(0x25ee, PIN_INPUT | MUX_MODE3) /* etk_d9.hsusb1_nxt */ 347*4882a593Smuzhiyun OMAP3430_CORE2_IOPAD(0x25dc, PIN_INPUT | MUX_MODE3) /* etk_d0.hsusb1_data0 */ 348*4882a593Smuzhiyun OMAP3430_CORE2_IOPAD(0x25de, PIN_INPUT | MUX_MODE3) /* etk_d1.hsusb1_data1 */ 349*4882a593Smuzhiyun OMAP3430_CORE2_IOPAD(0x25e0, PIN_INPUT | MUX_MODE3) /* etk_d2.hsusb1_data2 */ 350*4882a593Smuzhiyun OMAP3430_CORE2_IOPAD(0x25ea, PIN_INPUT | MUX_MODE3) /* etk_d7.hsusb1_data3 */ 351*4882a593Smuzhiyun OMAP3430_CORE2_IOPAD(0x25e4, PIN_INPUT | MUX_MODE3) /* etk_d4.hsusb1_data4 */ 352*4882a593Smuzhiyun OMAP3430_CORE2_IOPAD(0x25e6, PIN_INPUT | MUX_MODE3) /* etk_d5.hsusb1_data5 */ 353*4882a593Smuzhiyun OMAP3430_CORE2_IOPAD(0x25e8, PIN_INPUT | MUX_MODE3) /* etk_d6.hsusb1_data6 */ 354*4882a593Smuzhiyun OMAP3430_CORE2_IOPAD(0x25e2, PIN_INPUT | MUX_MODE3) /* etk_d3.hsusb1_data7 */ 355*4882a593Smuzhiyun >; 356*4882a593Smuzhiyun }; 357*4882a593Smuzhiyun}; 358