1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun/* 7*4882a593Smuzhiyun * VScom OnRISC 8*4882a593Smuzhiyun * http://www.vscom.de 9*4882a593Smuzhiyun */ 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/dts-v1/; 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun#include "am335x-baltos.dtsi" 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun/ { 16*4882a593Smuzhiyun model = "NetCom Plus"; 17*4882a593Smuzhiyun}; 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun&am33xx_pinmux { 20*4882a593Smuzhiyun pinctrl-names = "default"; 21*4882a593Smuzhiyun pinctrl-0 = <&dip_switches>; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun dip_switches: pinmux_dip_switches { 24*4882a593Smuzhiyun pinctrl-single,pins = < 25*4882a593Smuzhiyun AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLDOWN, MUX_MODE7) 26*4882a593Smuzhiyun AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLDOWN, MUX_MODE7) 27*4882a593Smuzhiyun AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLDOWN, MUX_MODE7) 28*4882a593Smuzhiyun AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLDOWN, MUX_MODE7) 29*4882a593Smuzhiyun >; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun tca6416_pins: pinmux_tca6416_pins { 33*4882a593Smuzhiyun pinctrl-single,pins = < 34*4882a593Smuzhiyun AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR1, PIN_INPUT_PULLUP, MUX_MODE7) 35*4882a593Smuzhiyun >; 36*4882a593Smuzhiyun }; 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun i2c2_pins: pinmux_i2c2_pins { 39*4882a593Smuzhiyun pinctrl-single,pins = < 40*4882a593Smuzhiyun AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLDOWN, MUX_MODE3) 41*4882a593Smuzhiyun AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLDOWN, MUX_MODE3) 42*4882a593Smuzhiyun >; 43*4882a593Smuzhiyun }; 44*4882a593Smuzhiyun}; 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun&usb0_phy { 47*4882a593Smuzhiyun status = "okay"; 48*4882a593Smuzhiyun}; 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun&usb1_phy { 51*4882a593Smuzhiyun status = "okay"; 52*4882a593Smuzhiyun}; 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun&usb0 { 55*4882a593Smuzhiyun status = "okay"; 56*4882a593Smuzhiyun dr_mode = "host"; 57*4882a593Smuzhiyun}; 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun&usb1 { 60*4882a593Smuzhiyun status = "okay"; 61*4882a593Smuzhiyun dr_mode = "host"; 62*4882a593Smuzhiyun}; 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun&i2c1 { 65*4882a593Smuzhiyun tca6416a: gpio@20 { 66*4882a593Smuzhiyun compatible = "ti,tca6416"; 67*4882a593Smuzhiyun reg = <0x20>; 68*4882a593Smuzhiyun gpio-controller; 69*4882a593Smuzhiyun #gpio-cells = <2>; 70*4882a593Smuzhiyun interrupt-parent = <&gpio0>; 71*4882a593Smuzhiyun interrupts = <20 IRQ_TYPE_EDGE_RISING>; 72*4882a593Smuzhiyun pinctrl-names = "default"; 73*4882a593Smuzhiyun pinctrl-0 = <&tca6416_pins>; 74*4882a593Smuzhiyun }; 75*4882a593Smuzhiyun}; 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun&i2c2 { 78*4882a593Smuzhiyun pinctrl-names = "default"; 79*4882a593Smuzhiyun pinctrl-0 = <&i2c2_pins>; 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun status = "okay"; 82*4882a593Smuzhiyun clock-frequency = <400000>; 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun tca6416b: gpio@20 { 85*4882a593Smuzhiyun compatible = "ti,tca6416"; 86*4882a593Smuzhiyun reg = <0x20>; 87*4882a593Smuzhiyun gpio-controller; 88*4882a593Smuzhiyun #gpio-cells = <2>; 89*4882a593Smuzhiyun }; 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun tca6416c: gpio@21 { 92*4882a593Smuzhiyun compatible = "ti,tca6416"; 93*4882a593Smuzhiyun reg = <0x21>; 94*4882a593Smuzhiyun gpio-controller; 95*4882a593Smuzhiyun #gpio-cells = <2>; 96*4882a593Smuzhiyun }; 97*4882a593Smuzhiyun}; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun&davinci_mdio { 100*4882a593Smuzhiyun phy0: ethernet-phy@0 { 101*4882a593Smuzhiyun reg = <1>; 102*4882a593Smuzhiyun }; 103*4882a593Smuzhiyun}; 104*4882a593Smuzhiyun 105*4882a593Smuzhiyun&cpsw_emac0 { 106*4882a593Smuzhiyun phy-mode = "rmii"; 107*4882a593Smuzhiyun dual_emac_res_vlan = <1>; 108*4882a593Smuzhiyun phy-handle = <&phy0>; 109*4882a593Smuzhiyun}; 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun&cpsw_emac1 { 112*4882a593Smuzhiyun phy-mode = "rgmii-id"; 113*4882a593Smuzhiyun dual_emac_res_vlan = <2>; 114*4882a593Smuzhiyun phy-handle = <&phy1>; 115*4882a593Smuzhiyun}; 116