xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/am335x-moxa-uc-8100-common.dtsi (revision 4882a59341e53eb6f0b4789bf948001014eff981)

// SPDX-License-Identifier: GPL-2.0-only
/*
 * Copyright (C) 2020 MOXA Inc. - https://www.moxa.com/
 *
 * Author: Johnson Chen <johnsonch.chen@moxa.com>
 */

#include "am33xx.dtsi"

/ {

	cpus {
		cpu@0 {
			cpu0-supply = <&vdd1_reg>;
		};
	};

	vbat: vbat-regulator {
		compatible = "regulator-fixed";
	};

	/* Power supply provides a fixed 3.3V @3A */
	vmmcsd_fixed: vmmcsd-regulator {
	      compatible = "regulator-fixed";
	      regulator-name = "vmmcsd_fixed";
	      regulator-min-microvolt = <3300000>;
	      regulator-max-microvolt = <3300000>;
	      regulator-boot-on;
	};

	buttons: push_button {
		compatible = "gpio-keys";
	};

};

&am33xx_pinmux {
	pinctrl-names = "default";
	pinctrl-0 = <&minipcie_pins>;

	minipcie_pins: pinmux_minipcie {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_LCD_PCLK, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* lcd_pclk.gpio2_24 */
			AM33XX_PADCONF(AM335X_PIN_LCD_AC_BIAS_EN, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* lcd_ac_bias_en.gpio2_25 */
			AM33XX_PADCONF(AM335X_PIN_LCD_VSYNC, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* lcd_vsync.gpio2_22  Power off PIN*/
		>;
	};

	push_button_pins: pinmux_push_button {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MCASP0_AHCLKX, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* mcasp0_ahcklx.gpio3_21 */
		>;
	};

	i2c0_pins: pinmux_i2c0_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_I2C0_SDA, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_I2C0_SCL, PIN_INPUT_PULLUP, MUX_MODE0)
		>;
	};


	i2c1_pins: pinmux_i2c1_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_INPUT_PULLUP, MUX_MODE3)	/* uart0_ctsn.i2c1_sda */
			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT_PULLUP, MUX_MODE3)	/* uart0_rtsn.i2c1_scl */
		>;
	};

	uart0_pins: pinmux_uart0_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
		>;
	};

	uart1_pins: pinmux_uart1_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT, MUX_MODE0)
		>;
	};

	uart2_pins: pinmux_uart2_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA14, PIN_INPUT, MUX_MODE6)		/* lcd_data14.uart5_ctsn */
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT_PULLDOWN, MUX_MODE6)  /* lcd_data15.uart5_rtsn */
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_INPUT_PULLUP, MUX_MODE4)     /* lcd_data9.uart5_rxd */
			AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT, MUX_MODE4)		/* lcd_data8.uart5_txd */
		>;
	};

	cpsw_default: cpsw_default {
		pinctrl-single,pins = <
			/* Slave 1 */
			AM33XX_PADCONF(AM335X_PIN_MII1_CRS, PIN_INPUT_PULLDOWN, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_MII1_RX_ER, PIN_INPUT_PULLUP, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLDOWN, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_INPUT_PULLUP, MUX_MODE1)
			AM33XX_PADCONF(AM335X_PIN_RMII1_REF_CLK, PIN_INPUT_PULLDOWN, MUX_MODE0)

			/* Slave 2 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLDOWN, MUX_MODE3)   /* rmii2_crs_dv */
			AM33XX_PADCONF(AM335X_PIN_GPMC_WPN, PIN_INPUT_PULLDOWN, MUX_MODE3)   /* rmii2_rxer */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A0, PIN_OUTPUT_PULLDOWN, MUX_MODE3)  /* rmii2_txen */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A4, PIN_OUTPUT_PULLDOWN, MUX_MODE3)  /* rmii2_td1 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT_PULLDOWN, MUX_MODE3)  /* rmii2_td0 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A10, PIN_INPUT_PULLDOWN, MUX_MODE3)   /* rmii2_rd1 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_A11, PIN_INPUT_PULLDOWN, MUX_MODE3)   /* rmii2_rd0 */
			AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLDOWN, MUX_MODE1)  /* rmii2_refclk */

		>;
	};

	davinci_mdio_default: davinci_mdio_default {
		pinctrl-single,pins = <
			/* MDIO */
			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT_PULLUP | SLEWCTRL_FAST, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLUP, MUX_MODE0)
		>;
	};

	mmc0_pins_default: pinmux_mmc0_pins {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT3, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT2, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT1, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_DAT0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_CLK, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MMC0_CMD, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKX, PIN_INPUT_PULLUP, MUX_MODE7)	/* mcasp0_aclkx.gpio3_14 */
			AM33XX_PADCONF(AM335X_PIN_MCASP0_ACLKR, PIN_INPUT_PULLUP, MUX_MODE7)    /* mcasp0_aclkx.gpio3_18 */
		>;
	};

	mmc2_pins_default: pinmux_mmc2_pins {
		pinctrl-single,pins = <
			/* eMMC */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD12, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_ad12.mmc2_dat0 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD13, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_ad13.mmc2_dat1 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD14, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_ad14.mmc2_dat2 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD15, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_ad15.mmc2_dat3 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD8, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_ad8.mmc2_dat4 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD9, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_ad9.mmc2_dat5 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_ad10.mmc2_dat6 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_ad11.mmc2_dat7 */
			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN3, PIN_INPUT_PULLUP, MUX_MODE3)     /* gpmc_csn3.mmc2_cmd */
			AM33XX_PADCONF(AM335X_PIN_GPMC_CLK, PIN_INPUT_PULLUP, MUX_MODE3)	/* gpmc_clk.mmc2_clk */
		>;
	};

	spi0_pins: pinmux_spi0 {
		pinctrl-single,pins = <
			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_CS0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_INPUT_PULLUP, MUX_MODE0)
			AM33XX_PADCONF(AM335X_PIN_SPI0_D1, PIN_INPUT_PULLUP, MUX_MODE0)
		>;
	};

};

&uart0 {
	/* Console */
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart0_pins>;
};

&uart1 {
	/* UART 1 setting */
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart1_pins>;
};

&uart5 {
	/* UART 2 setting */
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&uart2_pins>;
};

&i2c0 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c0_pins>;

	status = "okay";
	clock-frequency = <400000>;

	tps: tps@2d {
		compatible = "ti,tps65910";
		reg = <0x2d>;
	};

	eeprom: eeprom@50 {
		compatible = "atmel,24c16";
		pagesize = <16>;
		reg = <0x50>;
	};

	rtc_wdt: rtc_wdt@68 {
		compatible = "dallas,ds1374";
		reg = <0x68>;
	};
};

&i2c1 {
	pinctrl-names = "default";
	pinctrl-0 = <&i2c1_pins>;

	status = "okay";
	clock-frequency = <400000>;
	gpio_xten: gpio_xten@27 {
		compatible = "nxp,pca9535";
		gpio-controller;
		#gpio-cells = <2>;
		reg = <0x27>;
	};
};

&usb0 {
	dr_mode = "host";
};

&usb1 {
	dr_mode = "host";
};


#include "tps65910.dtsi"
&tps {
	vcc1-supply = <&vbat>;
	vcc2-supply = <&vbat>;
	vcc3-supply = <&vbat>;
	vcc4-supply = <&vbat>;
	vcc5-supply = <&vbat>;
	vcc6-supply = <&vbat>;
	vcc7-supply = <&vbat>;
	vccio-supply = <&vbat>;

	regulators {
		vrtc_reg: regulator@0 {
			regulator-always-on;
		};

		vio_reg: regulator@1 {
			regulator-always-on;
		};

		vdd1_reg: regulator@2 {
			regulator-always-on;
		};

		vdd2_reg: regulator@3 {
			regulator-always-on;
		};

		vdd3_reg: regulator@4 {
			regulator-always-on;
		};

		vdig1_reg: regulator@5 {
			regulator-always-on;
		};

		vdig2_reg: regulator@6 {
			regulator-always-on;
		};

		vpll_reg: regulator@7 {
			regulator-always-on;
		};

		vdac_reg: regulator@8 {
			regulator-always-on;
		};

		vaux1_reg: regulator@9 {
			regulator-always-on;
		};

		vaux2_reg: regulator@10 {
			regulator-always-on;
		};

		vaux33_reg: regulator@11 {
			regulator-always-on;
		};

		vmmc_reg: regulator@12 {
			compatible = "regulator-fixed";
			regulator-name = "vmmc_reg";
			regulator-min-microvolt = <3300000>;
			regulator-max-microvolt = <3300000>;
			regulator-always-on;
		};
	};
};

/* Power */
&vbat {
	regulator-name = "vbat";
	regulator-min-microvolt = <5000000>;
	regulator-max-microvolt = <5000000>;
};

&mac {
	pinctrl-names = "default";
	pinctrl-0 = <&cpsw_default>;
	dual_emac = <1>;
	status = "okay";
};

&davinci_mdio {
	pinctrl-names = "default";
	pinctrl-0 = <&davinci_mdio_default>;
	status = "okay";

	ethphy0: ethernet-phy@4 {
		reg = <4>;
	};

	ethphy1: ethernet-phy@5 {
		reg = <5>;
	};
};

&cpsw_emac0 {
	status = "okay";
	phy-handle = <&ethphy0>;
	phy-mode = "rmii";
	dual_emac_res_vlan = <1>;
};

&cpsw_emac1 {
	status = "okay";
	phy-handle = <&ethphy1>;
	phy-mode = "rmii";
	dual_emac_res_vlan = <2>;
};

&sham {
	status = "okay";
};

&aes {
	status = "okay";
};

&gpio0_target {
	ti,no-reset-on-init;
};

&mmc1 {
	pinctrl-names = "default";
	vmmc-supply = <&vmmcsd_fixed>;
	bus-width = <4>;
	pinctrl-0 = <&mmc0_pins_default>;
	cd-gpios = <&gpio3 14 GPIO_ACTIVE_HIGH>;
	wp-gpios = <&gpio3 18 GPIO_ACTIVE_HIGH>;
	status = "okay";
};

&mmc3 {
	dmas = <&edma_xbar 12 0 1
			&edma_xbar 13 0 2>;
	dma-names = "tx", "rx";
	pinctrl-names = "default";
	vmmc-supply = <&vmmcsd_fixed>;
	bus-width = <8>;
	pinctrl-0 = <&mmc2_pins_default>;
	ti,non-removable;
	status = "okay";
};

&buttons {
	pinctrl-names = "default";
	pinctrl-0 = <&push_button_pins>;
	#address-cells = <1>;
	#size-cells = <0>;

	button@0 {
		label = "push_button";
		linux,code = <0x100>;
		gpios = <&gpio3 21 GPIO_ACTIVE_LOW>;
	};
};

/* SPI Busses */
&spi0 {
	status = "okay";
	pinctrl-names = "default";
	pinctrl-0 = <&spi0_pins>;

	m25p80@0 {
		compatible = "mx25l6405d";
		spi-max-frequency = <40000000>;

		reg = <0>;
		spi-cpol;
		spi-cpha;
		#address-cells = <1>;
		#size-cells = <1>;

		/* reg : The partition's offset and size within the mtd bank. */
		partitions@0 {
			label = "MLO";
			reg = <0x0 0x80000>;
		};

		partitions@1 {
			label = "U-Boot";
			reg = <0x80000 0x100000>;
		};

		partitions@2 {
			label = "U-Boot Env";
			reg = <0x180000 0x20000>;
		};
	};
};