1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/ 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun&ldo3_reg { 7*4882a593Smuzhiyun regulator-min-microvolt = <1800000>; 8*4882a593Smuzhiyun regulator-max-microvolt = <1800000>; 9*4882a593Smuzhiyun regulator-always-on; 10*4882a593Smuzhiyun}; 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun&mmc1 { 13*4882a593Smuzhiyun vmmc-supply = <&vmmcsd_fixed>; 14*4882a593Smuzhiyun}; 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun&mmc2 { 17*4882a593Smuzhiyun vmmc-supply = <&vmmcsd_fixed>; 18*4882a593Smuzhiyun pinctrl-names = "default"; 19*4882a593Smuzhiyun pinctrl-0 = <&emmc_pins>; 20*4882a593Smuzhiyun bus-width = <8>; 21*4882a593Smuzhiyun status = "okay"; 22*4882a593Smuzhiyun}; 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun&am33xx_pinmux { 25*4882a593Smuzhiyun uart2_pins: uart2_pins { 26*4882a593Smuzhiyun pinctrl-single,pins = < 27*4882a593Smuzhiyun AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT, MUX_MODE1) /* spi0_sclk.uart2_rxd */ 28*4882a593Smuzhiyun AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT, MUX_MODE1) /* spi0_d0.uart2_txd */ 29*4882a593Smuzhiyun >; 30*4882a593Smuzhiyun }; 31*4882a593Smuzhiyun}; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun&uart2 { 34*4882a593Smuzhiyun pinctrl-names = "default"; 35*4882a593Smuzhiyun pinctrl-0 = <&uart2_pins>; 36*4882a593Smuzhiyun status = "okay"; 37*4882a593Smuzhiyun}; 38*4882a593Smuzhiyun 39*4882a593Smuzhiyun&rtc { 40*4882a593Smuzhiyun system-power-controller; 41*4882a593Smuzhiyun}; 42