xref: /OK3568_Linux_fs/kernel/arch/arm/boot/dts/am335x-boneblue.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2012 Texas Instruments Incorporated - https://www.ti.com/
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun/dts-v1/;
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun#include "am33xx.dtsi"
8*4882a593Smuzhiyun#include "am335x-osd335x-common.dtsi"
9*4882a593Smuzhiyun#include <dt-bindings/interrupt-controller/irq.h>
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun/ {
12*4882a593Smuzhiyun	model = "TI AM335x BeagleBone Blue";
13*4882a593Smuzhiyun	compatible = "ti,am335x-bone-blue", "ti,am33xx";
14*4882a593Smuzhiyun
15*4882a593Smuzhiyun	chosen {
16*4882a593Smuzhiyun		stdout-path = &uart0;
17*4882a593Smuzhiyun	};
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	leds {
20*4882a593Smuzhiyun		pinctrl-names = "default";
21*4882a593Smuzhiyun		pinctrl-0 = <&user_leds_s0>;
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun		compatible = "gpio-leds";
24*4882a593Smuzhiyun
25*4882a593Smuzhiyun		usr_0_led {
26*4882a593Smuzhiyun			label = "beaglebone:green:usr0";
27*4882a593Smuzhiyun			gpios = <&gpio1 21 GPIO_ACTIVE_HIGH>;
28*4882a593Smuzhiyun			linux,default-trigger = "heartbeat";
29*4882a593Smuzhiyun			default-state = "off";
30*4882a593Smuzhiyun		};
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		usr_1_led {
33*4882a593Smuzhiyun			label = "beaglebone:green:usr1";
34*4882a593Smuzhiyun			gpios = <&gpio1 22 GPIO_ACTIVE_HIGH>;
35*4882a593Smuzhiyun			linux,default-trigger = "mmc0";
36*4882a593Smuzhiyun			default-state = "off";
37*4882a593Smuzhiyun		};
38*4882a593Smuzhiyun
39*4882a593Smuzhiyun		usr_2_led {
40*4882a593Smuzhiyun			label = "beaglebone:green:usr2";
41*4882a593Smuzhiyun			gpios = <&gpio1 23 GPIO_ACTIVE_HIGH>;
42*4882a593Smuzhiyun			linux,default-trigger = "cpu0";
43*4882a593Smuzhiyun			default-state = "off";
44*4882a593Smuzhiyun		};
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun		usr_3_led {
47*4882a593Smuzhiyun			label = "beaglebone:green:usr3";
48*4882a593Smuzhiyun			gpios = <&gpio1 24 GPIO_ACTIVE_HIGH>;
49*4882a593Smuzhiyun			linux,default-trigger = "mmc1";
50*4882a593Smuzhiyun			default-state = "off";
51*4882a593Smuzhiyun		};
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun		wifi_led {
54*4882a593Smuzhiyun			label = "wifi";
55*4882a593Smuzhiyun			gpios = <&gpio0 19 GPIO_ACTIVE_HIGH>;
56*4882a593Smuzhiyun			default-state = "off";
57*4882a593Smuzhiyun			linux,default-trigger = "phy0assoc";
58*4882a593Smuzhiyun		};
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun		red_led {
61*4882a593Smuzhiyun			label = "red";
62*4882a593Smuzhiyun			gpios = <&gpio2 2 GPIO_ACTIVE_HIGH>;
63*4882a593Smuzhiyun			default-state = "off";
64*4882a593Smuzhiyun		};
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun		green_led {
67*4882a593Smuzhiyun			label = "green";
68*4882a593Smuzhiyun			gpios = <&gpio2 3 GPIO_ACTIVE_HIGH>;
69*4882a593Smuzhiyun			default-state = "off";
70*4882a593Smuzhiyun		};
71*4882a593Smuzhiyun
72*4882a593Smuzhiyun		batt_1_led {
73*4882a593Smuzhiyun			label = "bat25";
74*4882a593Smuzhiyun			gpios = <&gpio0 27 GPIO_ACTIVE_HIGH>;
75*4882a593Smuzhiyun			default-state = "off";
76*4882a593Smuzhiyun		};
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun		batt_2_led {
79*4882a593Smuzhiyun			label = "bat50";
80*4882a593Smuzhiyun			gpios = <&gpio0 11 GPIO_ACTIVE_HIGH>;
81*4882a593Smuzhiyun			default-state = "off";
82*4882a593Smuzhiyun		};
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun		batt_3_led {
85*4882a593Smuzhiyun			label = "bat75";
86*4882a593Smuzhiyun			gpios = <&gpio1 29 GPIO_ACTIVE_HIGH>;
87*4882a593Smuzhiyun			default-state = "off";
88*4882a593Smuzhiyun		};
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun		batt_4_led {
91*4882a593Smuzhiyun			label = "bat100";
92*4882a593Smuzhiyun			gpios = <&gpio0 26 GPIO_ACTIVE_HIGH>;
93*4882a593Smuzhiyun			default-state = "off";
94*4882a593Smuzhiyun		};
95*4882a593Smuzhiyun	};
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun	vmmcsd_fixed: fixedregulator0 {
98*4882a593Smuzhiyun		compatible = "regulator-fixed";
99*4882a593Smuzhiyun		regulator-name = "vmmcsd_fixed";
100*4882a593Smuzhiyun		regulator-min-microvolt = <3300000>;
101*4882a593Smuzhiyun		regulator-max-microvolt = <3300000>;
102*4882a593Smuzhiyun	};
103*4882a593Smuzhiyun
104*4882a593Smuzhiyun	wlan_en_reg: fixedregulator@2 {
105*4882a593Smuzhiyun		compatible = "regulator-fixed";
106*4882a593Smuzhiyun		regulator-name = "wlan-en-regulator";
107*4882a593Smuzhiyun		regulator-min-microvolt = <1800000>;
108*4882a593Smuzhiyun		regulator-max-microvolt = <1800000>;
109*4882a593Smuzhiyun		startup-delay-us= <70000>;
110*4882a593Smuzhiyun
111*4882a593Smuzhiyun		/* WL_EN */
112*4882a593Smuzhiyun		gpio = <&gpio3 9 0>;
113*4882a593Smuzhiyun		enable-active-high;
114*4882a593Smuzhiyun	};
115*4882a593Smuzhiyun};
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun&am33xx_pinmux {
118*4882a593Smuzhiyun	user_leds_s0: user_leds_s0 {
119*4882a593Smuzhiyun		pinctrl-single,pins = <
120*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A5, PIN_OUTPUT, MUX_MODE7) /* (V15) gpmc_a5.gpio1[21] - USR_LED_0 */
121*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A6, PIN_OUTPUT, MUX_MODE7) /* (U15) gpmc_a6.gpio1[22] - USR_LED_1 */
122*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A7, PIN_OUTPUT, MUX_MODE7) /* (T15) gpmc_a7.gpio1[23] - USR_LED_2 */
123*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_A8, PIN_OUTPUT, MUX_MODE7) /* (V16) gpmc_a8.gpio1[24] - USR_LED_3 */
124*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_XDMA_EVENT_INTR0, PIN_OUTPUT, MUX_MODE7) /* (A15) xdma_event_intr0.gpio0[19] - WIFI_LED */
125*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_ADVN_ALE, PIN_OUTPUT, MUX_MODE7) /* (R7) gpmc_advn_ale.gpio2[2] - P8.7, LED_RED, GP1_PIN_5 */
126*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_OEN_REN, PIN_OUTPUT, MUX_MODE7) /* (T7) gpmc_oen_ren.gpio2[3] - P8.8, LED_GREEN, GP1_PIN_6 */
127*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD11, PIN_OUTPUT, MUX_MODE7) /* (U12) gpmc_ad11.gpio0[27] - P8.17, BATT_LED_1 */
128*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA15, PIN_OUTPUT, MUX_MODE7) /* (T5) lcd_data15.gpio0[11] - P8.32, BATT_LED_2 */
129*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN0, PIN_OUTPUT, MUX_MODE7) /* (V6) gpmc_csn0.gpio1[29] - P8.26, BATT_LED_3 */
130*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD10, PIN_OUTPUT, MUX_MODE7) /* (T11) gpmc_ad10.gpio0[26] - P8.14, BATT_LED_4 */
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun		>;
133*4882a593Smuzhiyun	};
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun	i2c2_pins: pinmux_i2c2_pins {
136*4882a593Smuzhiyun		pinctrl-single,pins = <
137*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART1_CTSN, PIN_INPUT_PULLUP, MUX_MODE3)	/* (D18) uart1_ctsn.I2C2_SDA */
138*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART1_RTSN, PIN_INPUT_PULLUP, MUX_MODE3)	/* (D17) uart1_rtsn.I2C2_SCL */
139*4882a593Smuzhiyun		>;
140*4882a593Smuzhiyun	};
141*4882a593Smuzhiyun
142*4882a593Smuzhiyun	/* UT0 */
143*4882a593Smuzhiyun	uart0_pins: pinmux_uart0_pins {
144*4882a593Smuzhiyun		pinctrl-single,pins = <
145*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART0_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
146*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART0_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
147*4882a593Smuzhiyun		>;
148*4882a593Smuzhiyun	};
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun	/* UT1 */
151*4882a593Smuzhiyun	uart1_pins: pinmux_uart1_pins {
152*4882a593Smuzhiyun		pinctrl-single,pins = <
153*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART1_RXD, PIN_INPUT_PULLUP, MUX_MODE0)
154*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART1_TXD, PIN_OUTPUT_PULLDOWN, MUX_MODE0)
155*4882a593Smuzhiyun		>;
156*4882a593Smuzhiyun	};
157*4882a593Smuzhiyun
158*4882a593Smuzhiyun	/* GPS */
159*4882a593Smuzhiyun	uart2_pins: pinmux_uart2_pins {
160*4882a593Smuzhiyun		pinctrl-single,pins = <
161*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_SPI0_SCLK, PIN_INPUT_PULLUP, MUX_MODE1)	/* (A17) spi0_sclk.uart2_rxd */
162*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_SPI0_D0, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* (B17) spi0_d0.uart2_txd */
163*4882a593Smuzhiyun		>;
164*4882a593Smuzhiyun	};
165*4882a593Smuzhiyun
166*4882a593Smuzhiyun	/* DSM2 */
167*4882a593Smuzhiyun	uart4_pins: pinmux_uart4_pins {
168*4882a593Smuzhiyun		pinctrl-single,pins = <
169*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_WAIT0, PIN_INPUT_PULLUP, MUX_MODE6)	/* (T17) gpmc_wait0.uart4_rxd */
170*4882a593Smuzhiyun		>;
171*4882a593Smuzhiyun	};
172*4882a593Smuzhiyun
173*4882a593Smuzhiyun	/* UT5 */
174*4882a593Smuzhiyun	uart5_pins: pinmux_uart5_pins {
175*4882a593Smuzhiyun		pinctrl-single,pins = <
176*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA9, PIN_INPUT_PULLUP, MUX_MODE4)	/* (U2) lcd_data9.uart5_rxd */
177*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_LCD_DATA8, PIN_OUTPUT_PULLDOWN, MUX_MODE4)	/* (U1) lcd_data8.uart5_txd */
178*4882a593Smuzhiyun		>;
179*4882a593Smuzhiyun	};
180*4882a593Smuzhiyun
181*4882a593Smuzhiyun	mmc1_pins: pinmux_mmc1_pins {
182*4882a593Smuzhiyun		pinctrl-single,pins = <
183*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_SPI0_CS1, PIN_INPUT, MUX_MODE7)		/* (C15) spi0_cs1.gpio0[6] */
184*4882a593Smuzhiyun		>;
185*4882a593Smuzhiyun	};
186*4882a593Smuzhiyun
187*4882a593Smuzhiyun	mmc2_pins: pinmux_mmc2_pins {
188*4882a593Smuzhiyun		pinctrl-single,pins = <
189*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN1, PIN_INPUT_PULLUP, MUX_MODE2)	/* (U9) gpmc_csn1.mmc1_clk */
190*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_CSN2, PIN_INPUT_PULLUP, MUX_MODE2)	/* (V9) gpmc_csn2.mmc1_cmd */
191*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD0, PIN_INPUT_PULLUP, MUX_MODE1)	/* (U7) gpmc_ad0.mmc1_dat0 */
192*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD1, PIN_INPUT_PULLUP, MUX_MODE1)	/* (V7) gpmc_ad1.mmc1_dat1 */
193*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD2, PIN_INPUT_PULLUP, MUX_MODE1)	/* (R8) gpmc_ad2.mmc1_dat2 */
194*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD3, PIN_INPUT_PULLUP, MUX_MODE1)	/* (T8) gpmc_ad3.mmc1_dat3 */
195*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD4, PIN_INPUT_PULLUP, MUX_MODE1)	/* (U8) gpmc_ad4.mmc1_dat4 */
196*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD5, PIN_INPUT_PULLUP, MUX_MODE1)	/* (V8) gpmc_ad5.mmc1_dat5 */
197*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD6, PIN_INPUT_PULLUP, MUX_MODE1)	/* (R9) gpmc_ad6.mmc1_dat6 */
198*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_GPMC_AD7, PIN_INPUT_PULLUP, MUX_MODE1)	/* (T9) gpmc_ad7.mmc1_dat7 */
199*4882a593Smuzhiyun		>;
200*4882a593Smuzhiyun	};
201*4882a593Smuzhiyun
202*4882a593Smuzhiyun	mmc3_pins: pinmux_mmc3_pins {
203*4882a593Smuzhiyun		pinctrl-single,pins = <
204*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RXD1, PIN_INPUT_PULLUP, MUX_MODE6)	/* (L15) gmii1_rxd1.mmc2_clk */
205*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TX_EN, PIN_INPUT_PULLUP, MUX_MODE6)	/* (J16) gmii1_txen.mmc2_cmd */
206*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RX_DV, PIN_INPUT_PULLUP, MUX_MODE5)	/* (J17) gmii1_rxdv.mmc2_dat0 */
207*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TXD3, PIN_INPUT_PULLUP, MUX_MODE5)	/* (J18) gmii1_txd3.mmc2_dat1 */
208*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TXD2, PIN_INPUT_PULLUP, MUX_MODE5)	/* (K15) gmii1_txd2.mmc2_dat2 */
209*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_COL, PIN_INPUT_PULLUP, MUX_MODE5)	/* (H16) gmii1_col.mmc2_dat3 */
210*4882a593Smuzhiyun		>;
211*4882a593Smuzhiyun	};
212*4882a593Smuzhiyun
213*4882a593Smuzhiyun	bt_pins: pinmux_bt_pins {
214*4882a593Smuzhiyun		pinctrl-single,pins = <
215*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TXD0, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* (K17) gmii1_txd0.gpio0[28] - BT_EN */
216*4882a593Smuzhiyun		>;
217*4882a593Smuzhiyun	};
218*4882a593Smuzhiyun
219*4882a593Smuzhiyun	uart3_pins: pinmux_uart3_pins {
220*4882a593Smuzhiyun		pinctrl-single,pins = <
221*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RXD3, PIN_INPUT_PULLUP, MUX_MODE1)	/* (L17) gmii1_rxd3.uart3_rxd */
222*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RXD2, PIN_OUTPUT_PULLDOWN, MUX_MODE1)	/* (L16) gmii1_rxd2.uart3_txd */
223*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MDIO, PIN_INPUT, MUX_MODE3)		/* (M17) mdio_data.uart3_ctsn */
224*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MDC, PIN_OUTPUT_PULLDOWN, MUX_MODE3)	/* (M18) mdio_clk.uart3_rtsn */
225*4882a593Smuzhiyun		>;
226*4882a593Smuzhiyun	};
227*4882a593Smuzhiyun
228*4882a593Smuzhiyun	wl18xx_pins: pinmux_wl18xx_pins {
229*4882a593Smuzhiyun		pinctrl-single,pins = <
230*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TX_CLK, PIN_OUTPUT_PULLDOWN, MUX_MODE7)	/* (K18) gmii1_txclk.gpio3[9] - WL_EN */
231*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_TXD1, PIN_INPUT_PULLDOWN, MUX_MODE7)	/* (K16) gmii1_txd1.gpio0[21] - WL_IRQ */
232*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RX_CLK, PIN_OUTPUT_PULLUP, MUX_MODE7)	/* (L18) gmii1_rxclk.gpio3[10] - LS_BUF_EN */
233*4882a593Smuzhiyun		>;
234*4882a593Smuzhiyun	};
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun	/* DCAN */
237*4882a593Smuzhiyun	dcan1_pins: pinmux_dcan1_pins {
238*4882a593Smuzhiyun		pinctrl-single,pins = <
239*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART0_RTSN, PIN_INPUT, MUX_MODE2)		/* (E17) uart0_rtsn.dcan1_rx */
240*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_UART0_CTSN, PIN_OUTPUT, MUX_MODE2)		/* (E18) uart0_ctsn.dcan1_tx */
241*4882a593Smuzhiyun			AM33XX_PADCONF(AM335X_PIN_MII1_RXD0, PIN_OUTPUT, MUX_MODE7)		/* (M16) gmii1_rxd0.gpio2[21] */
242*4882a593Smuzhiyun		>;
243*4882a593Smuzhiyun	};
244*4882a593Smuzhiyun};
245*4882a593Smuzhiyun
246*4882a593Smuzhiyun&uart0 {
247*4882a593Smuzhiyun	pinctrl-names = "default";
248*4882a593Smuzhiyun	pinctrl-0 = <&uart0_pins>;
249*4882a593Smuzhiyun
250*4882a593Smuzhiyun	status = "okay";
251*4882a593Smuzhiyun};
252*4882a593Smuzhiyun
253*4882a593Smuzhiyun&uart1 {
254*4882a593Smuzhiyun	pinctrl-names = "default";
255*4882a593Smuzhiyun	pinctrl-0 = <&uart1_pins>;
256*4882a593Smuzhiyun
257*4882a593Smuzhiyun	status = "okay";
258*4882a593Smuzhiyun};
259*4882a593Smuzhiyun
260*4882a593Smuzhiyun&uart2 {
261*4882a593Smuzhiyun	pinctrl-names = "default";
262*4882a593Smuzhiyun	pinctrl-0 = <&uart2_pins>;
263*4882a593Smuzhiyun
264*4882a593Smuzhiyun	status = "okay";
265*4882a593Smuzhiyun};
266*4882a593Smuzhiyun
267*4882a593Smuzhiyun&uart4 {
268*4882a593Smuzhiyun	pinctrl-names = "default";
269*4882a593Smuzhiyun	pinctrl-0 = <&uart4_pins>;
270*4882a593Smuzhiyun
271*4882a593Smuzhiyun	status = "okay";
272*4882a593Smuzhiyun};
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun&uart5 {
275*4882a593Smuzhiyun	pinctrl-names = "default";
276*4882a593Smuzhiyun	pinctrl-0 = <&uart5_pins>;
277*4882a593Smuzhiyun
278*4882a593Smuzhiyun	status = "okay";
279*4882a593Smuzhiyun};
280*4882a593Smuzhiyun
281*4882a593Smuzhiyun&usb0 {
282*4882a593Smuzhiyun	dr_mode = "peripheral";
283*4882a593Smuzhiyun	interrupts-extended = <&intc 18 &tps 0>;
284*4882a593Smuzhiyun	interrupt-names = "mc", "vbus";
285*4882a593Smuzhiyun};
286*4882a593Smuzhiyun
287*4882a593Smuzhiyun&usb1 {
288*4882a593Smuzhiyun	dr_mode = "host";
289*4882a593Smuzhiyun};
290*4882a593Smuzhiyun
291*4882a593Smuzhiyun&i2c0 {
292*4882a593Smuzhiyun	baseboard_eeprom: baseboard_eeprom@50 {
293*4882a593Smuzhiyun		compatible = "atmel,24c256";
294*4882a593Smuzhiyun		reg = <0x50>;
295*4882a593Smuzhiyun
296*4882a593Smuzhiyun		#address-cells = <1>;
297*4882a593Smuzhiyun		#size-cells = <1>;
298*4882a593Smuzhiyun		baseboard_data: baseboard_data@0 {
299*4882a593Smuzhiyun			reg = <0 0x100>;
300*4882a593Smuzhiyun		};
301*4882a593Smuzhiyun	};
302*4882a593Smuzhiyun};
303*4882a593Smuzhiyun
304*4882a593Smuzhiyun&i2c2 {
305*4882a593Smuzhiyun	pinctrl-names = "default";
306*4882a593Smuzhiyun	pinctrl-0 = <&i2c2_pins>;
307*4882a593Smuzhiyun
308*4882a593Smuzhiyun	status = "okay";
309*4882a593Smuzhiyun	clock-frequency = <400000>;
310*4882a593Smuzhiyun
311*4882a593Smuzhiyun	mpu9250@68 {
312*4882a593Smuzhiyun		compatible = "invensense,mpu9250";
313*4882a593Smuzhiyun		reg = <0x68>;
314*4882a593Smuzhiyun		interrupt-parent = <&gpio3>;
315*4882a593Smuzhiyun		interrupts = <21 IRQ_TYPE_EDGE_RISING>;
316*4882a593Smuzhiyun		i2c-gate {
317*4882a593Smuzhiyun			#address-cells = <1>;
318*4882a593Smuzhiyun			#size-cells = <0>;
319*4882a593Smuzhiyun			ax8975@c {
320*4882a593Smuzhiyun				compatible = "ak,ak8975";
321*4882a593Smuzhiyun				reg = <0x0c>;
322*4882a593Smuzhiyun			};
323*4882a593Smuzhiyun		};
324*4882a593Smuzhiyun	};
325*4882a593Smuzhiyun
326*4882a593Smuzhiyun	pressure@76 {
327*4882a593Smuzhiyun		compatible = "bosch,bmp280";
328*4882a593Smuzhiyun		reg = <0x76>;
329*4882a593Smuzhiyun	};
330*4882a593Smuzhiyun};
331*4882a593Smuzhiyun
332*4882a593Smuzhiyun/include/ "tps65217.dtsi"
333*4882a593Smuzhiyun
334*4882a593Smuzhiyun&tps {
335*4882a593Smuzhiyun	/delete-property/ ti,pmic-shutdown-controller;
336*4882a593Smuzhiyun
337*4882a593Smuzhiyun	charger {
338*4882a593Smuzhiyun		interrupts = <0>, <1>;
339*4882a593Smuzhiyun		interrupt-names = "USB", "AC";
340*4882a593Smuzhiyun		status = "okay";
341*4882a593Smuzhiyun	};
342*4882a593Smuzhiyun};
343*4882a593Smuzhiyun
344*4882a593Smuzhiyun&mmc1 {
345*4882a593Smuzhiyun	status = "okay";
346*4882a593Smuzhiyun	vmmc-supply = <&vmmcsd_fixed>;
347*4882a593Smuzhiyun	bus-width = <4>;
348*4882a593Smuzhiyun	pinctrl-names = "default";
349*4882a593Smuzhiyun	pinctrl-0 = <&mmc1_pins>;
350*4882a593Smuzhiyun	cd-gpios = <&gpio0 6 GPIO_ACTIVE_LOW>;
351*4882a593Smuzhiyun};
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun&mmc2 {
354*4882a593Smuzhiyun	status = "okay";
355*4882a593Smuzhiyun	vmmc-supply = <&vmmcsd_fixed>;
356*4882a593Smuzhiyun	bus-width = <8>;
357*4882a593Smuzhiyun	pinctrl-names = "default";
358*4882a593Smuzhiyun	pinctrl-0 = <&mmc2_pins>;
359*4882a593Smuzhiyun};
360*4882a593Smuzhiyun
361*4882a593Smuzhiyun&mmc3 {
362*4882a593Smuzhiyun	dmas = <&edma_xbar 12 0 1
363*4882a593Smuzhiyun		&edma_xbar 13 0 2>;
364*4882a593Smuzhiyun	dma-names = "tx", "rx";
365*4882a593Smuzhiyun	status = "okay";
366*4882a593Smuzhiyun	vmmc-supply = <&wlan_en_reg>;
367*4882a593Smuzhiyun	bus-width = <4>;
368*4882a593Smuzhiyun	non-removable;
369*4882a593Smuzhiyun	cap-power-off-card;
370*4882a593Smuzhiyun	keep-power-in-suspend;
371*4882a593Smuzhiyun	pinctrl-names = "default";
372*4882a593Smuzhiyun	pinctrl-0 = <&mmc3_pins &wl18xx_pins>;
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun	#address-cells = <1>;
375*4882a593Smuzhiyun	#size-cells = <0>;
376*4882a593Smuzhiyun	wlcore: wlcore@2 {
377*4882a593Smuzhiyun		compatible = "ti,wl1835";
378*4882a593Smuzhiyun		reg = <2>;
379*4882a593Smuzhiyun		interrupt-parent = <&gpio0>;
380*4882a593Smuzhiyun		interrupts = <21 IRQ_TYPE_EDGE_RISING>;
381*4882a593Smuzhiyun	};
382*4882a593Smuzhiyun};
383*4882a593Smuzhiyun
384*4882a593Smuzhiyun&tscadc {
385*4882a593Smuzhiyun	status = "okay";
386*4882a593Smuzhiyun	adc {
387*4882a593Smuzhiyun		ti,adc-channels = <0 1 2 3 4 5 6 7>;
388*4882a593Smuzhiyun	};
389*4882a593Smuzhiyun};
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun&uart3 {
392*4882a593Smuzhiyun	pinctrl-names = "default";
393*4882a593Smuzhiyun	pinctrl-0 = <&uart3_pins &bt_pins>;
394*4882a593Smuzhiyun	status = "okay";
395*4882a593Smuzhiyun
396*4882a593Smuzhiyun	bluetooth {
397*4882a593Smuzhiyun		compatible = "ti,wl1835-st";
398*4882a593Smuzhiyun		enable-gpios = <&gpio0 28 GPIO_ACTIVE_HIGH>;
399*4882a593Smuzhiyun	};
400*4882a593Smuzhiyun};
401*4882a593Smuzhiyun
402*4882a593Smuzhiyun&rtc {
403*4882a593Smuzhiyun	system-power-controller;
404*4882a593Smuzhiyun	clocks = <&clk_32768_ck>, <&clk_24mhz_clkctrl AM3_CLK_24MHZ_CLKDIV32K_CLKCTRL 0>;
405*4882a593Smuzhiyun	clock-names = "ext-clk", "int-clk";
406*4882a593Smuzhiyun};
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun&dcan1 {
409*4882a593Smuzhiyun	pinctrl-names = "default";
410*4882a593Smuzhiyun	pinctrl-0 = <&dcan1_pins>;
411*4882a593Smuzhiyun	status = "okay";
412*4882a593Smuzhiyun};
413*4882a593Smuzhiyun
414*4882a593Smuzhiyun&gpio3 {
415*4882a593Smuzhiyun	ls_buf_en {
416*4882a593Smuzhiyun		gpio-hog;
417*4882a593Smuzhiyun		gpios = <10 GPIO_ACTIVE_HIGH>;
418*4882a593Smuzhiyun		output-high;
419*4882a593Smuzhiyun		line-name = "LS_BUF_EN";
420*4882a593Smuzhiyun	};
421*4882a593Smuzhiyun};
422