1*4882a593Smuzhiyun/* SPDX-License-Identifier: GPL-2.0-only */ 2*4882a593Smuzhiyun/* 3*4882a593Smuzhiyun * linux/arch/arm/lib/ll_char_wr.S 4*4882a593Smuzhiyun * 5*4882a593Smuzhiyun * Copyright (C) 1995, 1996 Russell King. 6*4882a593Smuzhiyun * 7*4882a593Smuzhiyun * Speedups & 1bpp code (C) 1996 Philip Blundell & Russell King. 8*4882a593Smuzhiyun * 9*4882a593Smuzhiyun * 10-04-96 RMK Various cleanups & reduced register usage. 10*4882a593Smuzhiyun * 08-04-98 RMK Shifts re-ordered 11*4882a593Smuzhiyun */ 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun@ Regs: [] = corruptible 14*4882a593Smuzhiyun@ {} = used 15*4882a593Smuzhiyun@ () = do not use 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun#include <linux/linkage.h> 18*4882a593Smuzhiyun#include <asm/assembler.h> 19*4882a593Smuzhiyun .text 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunLC0: .word LC0 22*4882a593Smuzhiyun .word bytes_per_char_h 23*4882a593Smuzhiyun .word video_size_row 24*4882a593Smuzhiyun .word acorndata_8x8 25*4882a593Smuzhiyun .word con_charconvtable 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun/* 28*4882a593Smuzhiyun * r0 = ptr 29*4882a593Smuzhiyun * r1 = char 30*4882a593Smuzhiyun * r2 = white 31*4882a593Smuzhiyun */ 32*4882a593SmuzhiyunENTRY(ll_write_char) 33*4882a593Smuzhiyun stmfd sp!, {r4 - r7, lr} 34*4882a593Smuzhiyun@ 35*4882a593Smuzhiyun@ Smashable regs: {r0 - r3}, [r4 - r7], (r8 - fp), [ip], (sp), [lr], (pc) 36*4882a593Smuzhiyun@ 37*4882a593Smuzhiyun /* 38*4882a593Smuzhiyun * calculate offset into character table 39*4882a593Smuzhiyun */ 40*4882a593Smuzhiyun mov r1, r1, lsl #3 41*4882a593Smuzhiyun /* 42*4882a593Smuzhiyun * calculate offset required for each row. 43*4882a593Smuzhiyun */ 44*4882a593Smuzhiyun adr ip, LC0 45*4882a593Smuzhiyun ldmia ip, {r3, r4, r5, r6, lr} 46*4882a593Smuzhiyun sub ip, ip, r3 47*4882a593Smuzhiyun add r6, r6, ip 48*4882a593Smuzhiyun add lr, lr, ip 49*4882a593Smuzhiyun ldr r4, [r4, ip] 50*4882a593Smuzhiyun ldr r5, [r5, ip] 51*4882a593Smuzhiyun /* 52*4882a593Smuzhiyun * Go to resolution-dependent routine... 53*4882a593Smuzhiyun */ 54*4882a593Smuzhiyun cmp r4, #4 55*4882a593Smuzhiyun blt Lrow1bpp 56*4882a593Smuzhiyun add r0, r0, r5, lsl #3 @ Move to bottom of character 57*4882a593Smuzhiyun orr r1, r1, #7 58*4882a593Smuzhiyun ldrb r7, [r6, r1] 59*4882a593Smuzhiyun teq r4, #8 60*4882a593Smuzhiyun beq Lrow8bpplp 61*4882a593Smuzhiyun@ 62*4882a593Smuzhiyun@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc) 63*4882a593Smuzhiyun@ 64*4882a593SmuzhiyunLrow4bpplp: 65*4882a593Smuzhiyun ldr r7, [lr, r7, lsl #2] 66*4882a593Smuzhiyun mul r7, r2, r7 67*4882a593Smuzhiyun sub r1, r1, #1 @ avoid using r7 directly after 68*4882a593Smuzhiyun str r7, [r0, -r5]! 69*4882a593Smuzhiyun ldrb r7, [r6, r1] 70*4882a593Smuzhiyun ldr r7, [lr, r7, lsl #2] 71*4882a593Smuzhiyun mul r7, r2, r7 72*4882a593Smuzhiyun tst r1, #7 @ avoid using r7 directly after 73*4882a593Smuzhiyun str r7, [r0, -r5]! 74*4882a593Smuzhiyun subne r1, r1, #1 75*4882a593Smuzhiyun ldrbne r7, [r6, r1] 76*4882a593Smuzhiyun bne Lrow4bpplp 77*4882a593Smuzhiyun ldmfd sp!, {r4 - r7, pc} 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun@ 80*4882a593Smuzhiyun@ Smashable regs: {r0 - r3}, [r4], {r5 - r7}, (r8 - fp), [ip], (sp), {lr}, (pc) 81*4882a593Smuzhiyun@ 82*4882a593SmuzhiyunLrow8bpplp: 83*4882a593Smuzhiyun mov ip, r7, lsr #4 84*4882a593Smuzhiyun ldr ip, [lr, ip, lsl #2] 85*4882a593Smuzhiyun mul r4, r2, ip 86*4882a593Smuzhiyun and ip, r7, #15 @ avoid r4 87*4882a593Smuzhiyun ldr ip, [lr, ip, lsl #2] @ avoid r4 88*4882a593Smuzhiyun mul ip, r2, ip @ avoid r4 89*4882a593Smuzhiyun sub r1, r1, #1 @ avoid ip 90*4882a593Smuzhiyun sub r0, r0, r5 @ avoid ip 91*4882a593Smuzhiyun stmia r0, {r4, ip} 92*4882a593Smuzhiyun ldrb r7, [r6, r1] 93*4882a593Smuzhiyun mov ip, r7, lsr #4 94*4882a593Smuzhiyun ldr ip, [lr, ip, lsl #2] 95*4882a593Smuzhiyun mul r4, r2, ip 96*4882a593Smuzhiyun and ip, r7, #15 @ avoid r4 97*4882a593Smuzhiyun ldr ip, [lr, ip, lsl #2] @ avoid r4 98*4882a593Smuzhiyun mul ip, r2, ip @ avoid r4 99*4882a593Smuzhiyun tst r1, #7 @ avoid ip 100*4882a593Smuzhiyun sub r0, r0, r5 @ avoid ip 101*4882a593Smuzhiyun stmia r0, {r4, ip} 102*4882a593Smuzhiyun subne r1, r1, #1 103*4882a593Smuzhiyun ldrbne r7, [r6, r1] 104*4882a593Smuzhiyun bne Lrow8bpplp 105*4882a593Smuzhiyun ldmfd sp!, {r4 - r7, pc} 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun@ 108*4882a593Smuzhiyun@ Smashable regs: {r0 - r3}, [r4], {r5, r6}, [r7], (r8 - fp), [ip], (sp), [lr], (pc) 109*4882a593Smuzhiyun@ 110*4882a593SmuzhiyunLrow1bpp: 111*4882a593Smuzhiyun add r6, r6, r1 112*4882a593Smuzhiyun ldmia r6, {r4, r7} 113*4882a593Smuzhiyun strb r4, [r0], r5 114*4882a593Smuzhiyun mov r4, r4, lsr #8 115*4882a593Smuzhiyun strb r4, [r0], r5 116*4882a593Smuzhiyun mov r4, r4, lsr #8 117*4882a593Smuzhiyun strb r4, [r0], r5 118*4882a593Smuzhiyun mov r4, r4, lsr #8 119*4882a593Smuzhiyun strb r4, [r0], r5 120*4882a593Smuzhiyun strb r7, [r0], r5 121*4882a593Smuzhiyun mov r7, r7, lsr #8 122*4882a593Smuzhiyun strb r7, [r0], r5 123*4882a593Smuzhiyun mov r7, r7, lsr #8 124*4882a593Smuzhiyun strb r7, [r0], r5 125*4882a593Smuzhiyun mov r7, r7, lsr #8 126*4882a593Smuzhiyun strb r7, [r0], r5 127*4882a593Smuzhiyun ldmfd sp!, {r4 - r7, pc} 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun .bss 130*4882a593SmuzhiyunENTRY(con_charconvtable) 131*4882a593Smuzhiyun .space 1024 132