1*4882a593Smuzhiyun // SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
4*4882a593Smuzhiyun *
5*4882a593Smuzhiyun * RajeshwarR: Dec 11, 2007
6*4882a593Smuzhiyun * -- Added support for Inter Processor Interrupts
7*4882a593Smuzhiyun *
8*4882a593Smuzhiyun * Vineetg: Nov 1st, 2007
9*4882a593Smuzhiyun * -- Initial Write (Borrowed heavily from ARM)
10*4882a593Smuzhiyun */
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #include <linux/spinlock.h>
13*4882a593Smuzhiyun #include <linux/sched/mm.h>
14*4882a593Smuzhiyun #include <linux/interrupt.h>
15*4882a593Smuzhiyun #include <linux/profile.h>
16*4882a593Smuzhiyun #include <linux/mm.h>
17*4882a593Smuzhiyun #include <linux/cpu.h>
18*4882a593Smuzhiyun #include <linux/irq.h>
19*4882a593Smuzhiyun #include <linux/atomic.h>
20*4882a593Smuzhiyun #include <linux/cpumask.h>
21*4882a593Smuzhiyun #include <linux/reboot.h>
22*4882a593Smuzhiyun #include <linux/irqdomain.h>
23*4882a593Smuzhiyun #include <linux/export.h>
24*4882a593Smuzhiyun #include <linux/of_fdt.h>
25*4882a593Smuzhiyun
26*4882a593Smuzhiyun #include <asm/processor.h>
27*4882a593Smuzhiyun #include <asm/setup.h>
28*4882a593Smuzhiyun #include <asm/mach_desc.h>
29*4882a593Smuzhiyun
30*4882a593Smuzhiyun #ifndef CONFIG_ARC_HAS_LLSC
31*4882a593Smuzhiyun arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
32*4882a593Smuzhiyun arch_spinlock_t smp_bitops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(smp_atomic_ops_lock);
35*4882a593Smuzhiyun EXPORT_SYMBOL_GPL(smp_bitops_lock);
36*4882a593Smuzhiyun #endif
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun struct plat_smp_ops __weak plat_smp_ops;
39*4882a593Smuzhiyun
40*4882a593Smuzhiyun /* XXX: per cpu ? Only needed once in early seconday boot */
41*4882a593Smuzhiyun struct task_struct *secondary_idle_tsk;
42*4882a593Smuzhiyun
43*4882a593Smuzhiyun /* Called from start_kernel */
smp_prepare_boot_cpu(void)44*4882a593Smuzhiyun void __init smp_prepare_boot_cpu(void)
45*4882a593Smuzhiyun {
46*4882a593Smuzhiyun }
47*4882a593Smuzhiyun
arc_get_cpu_map(const char * name,struct cpumask * cpumask)48*4882a593Smuzhiyun static int __init arc_get_cpu_map(const char *name, struct cpumask *cpumask)
49*4882a593Smuzhiyun {
50*4882a593Smuzhiyun unsigned long dt_root = of_get_flat_dt_root();
51*4882a593Smuzhiyun const char *buf;
52*4882a593Smuzhiyun
53*4882a593Smuzhiyun buf = of_get_flat_dt_prop(dt_root, name, NULL);
54*4882a593Smuzhiyun if (!buf)
55*4882a593Smuzhiyun return -EINVAL;
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun if (cpulist_parse(buf, cpumask))
58*4882a593Smuzhiyun return -EINVAL;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun return 0;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun /*
64*4882a593Smuzhiyun * Read from DeviceTree and setup cpu possible mask. If there is no
65*4882a593Smuzhiyun * "possible-cpus" property in DeviceTree pretend all [0..NR_CPUS-1] exist.
66*4882a593Smuzhiyun */
arc_init_cpu_possible(void)67*4882a593Smuzhiyun static void __init arc_init_cpu_possible(void)
68*4882a593Smuzhiyun {
69*4882a593Smuzhiyun struct cpumask cpumask;
70*4882a593Smuzhiyun
71*4882a593Smuzhiyun if (arc_get_cpu_map("possible-cpus", &cpumask)) {
72*4882a593Smuzhiyun pr_warn("Failed to get possible-cpus from dtb, pretending all %u cpus exist\n",
73*4882a593Smuzhiyun NR_CPUS);
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun cpumask_setall(&cpumask);
76*4882a593Smuzhiyun }
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun if (!cpumask_test_cpu(0, &cpumask))
79*4882a593Smuzhiyun panic("Master cpu (cpu[0]) is missed in cpu possible mask!");
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun init_cpu_possible(&cpumask);
82*4882a593Smuzhiyun }
83*4882a593Smuzhiyun
84*4882a593Smuzhiyun /*
85*4882a593Smuzhiyun * Called from setup_arch() before calling setup_processor()
86*4882a593Smuzhiyun *
87*4882a593Smuzhiyun * - Initialise the CPU possible map early - this describes the CPUs
88*4882a593Smuzhiyun * which may be present or become present in the system.
89*4882a593Smuzhiyun * - Call early smp init hook. This can initialize a specific multi-core
90*4882a593Smuzhiyun * IP which is say common to several platforms (hence not part of
91*4882a593Smuzhiyun * platform specific int_early() hook)
92*4882a593Smuzhiyun */
smp_init_cpus(void)93*4882a593Smuzhiyun void __init smp_init_cpus(void)
94*4882a593Smuzhiyun {
95*4882a593Smuzhiyun arc_init_cpu_possible();
96*4882a593Smuzhiyun
97*4882a593Smuzhiyun if (plat_smp_ops.init_early_smp)
98*4882a593Smuzhiyun plat_smp_ops.init_early_smp();
99*4882a593Smuzhiyun }
100*4882a593Smuzhiyun
101*4882a593Smuzhiyun /* called from init ( ) => process 1 */
smp_prepare_cpus(unsigned int max_cpus)102*4882a593Smuzhiyun void __init smp_prepare_cpus(unsigned int max_cpus)
103*4882a593Smuzhiyun {
104*4882a593Smuzhiyun /*
105*4882a593Smuzhiyun * if platform didn't set the present map already, do it now
106*4882a593Smuzhiyun * boot cpu is set to present already by init/main.c
107*4882a593Smuzhiyun */
108*4882a593Smuzhiyun if (num_present_cpus() <= 1)
109*4882a593Smuzhiyun init_cpu_present(cpu_possible_mask);
110*4882a593Smuzhiyun }
111*4882a593Smuzhiyun
smp_cpus_done(unsigned int max_cpus)112*4882a593Smuzhiyun void __init smp_cpus_done(unsigned int max_cpus)
113*4882a593Smuzhiyun {
114*4882a593Smuzhiyun
115*4882a593Smuzhiyun }
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun /*
118*4882a593Smuzhiyun * Default smp boot helper for Run-on-reset case where all cores start off
119*4882a593Smuzhiyun * together. Non-masters need to wait for Master to start running.
120*4882a593Smuzhiyun * This is implemented using a flag in memory, which Non-masters spin-wait on.
121*4882a593Smuzhiyun * Master sets it to cpu-id of core to "ungate" it.
122*4882a593Smuzhiyun */
123*4882a593Smuzhiyun static volatile int wake_flag;
124*4882a593Smuzhiyun
125*4882a593Smuzhiyun #ifdef CONFIG_ISA_ARCOMPACT
126*4882a593Smuzhiyun
127*4882a593Smuzhiyun #define __boot_read(f) f
128*4882a593Smuzhiyun #define __boot_write(f, v) f = v
129*4882a593Smuzhiyun
130*4882a593Smuzhiyun #else
131*4882a593Smuzhiyun
132*4882a593Smuzhiyun #define __boot_read(f) arc_read_uncached_32(&f)
133*4882a593Smuzhiyun #define __boot_write(f, v) arc_write_uncached_32(&f, v)
134*4882a593Smuzhiyun
135*4882a593Smuzhiyun #endif
136*4882a593Smuzhiyun
arc_default_smp_cpu_kick(int cpu,unsigned long pc)137*4882a593Smuzhiyun static void arc_default_smp_cpu_kick(int cpu, unsigned long pc)
138*4882a593Smuzhiyun {
139*4882a593Smuzhiyun BUG_ON(cpu == 0);
140*4882a593Smuzhiyun
141*4882a593Smuzhiyun __boot_write(wake_flag, cpu);
142*4882a593Smuzhiyun }
143*4882a593Smuzhiyun
arc_platform_smp_wait_to_boot(int cpu)144*4882a593Smuzhiyun void arc_platform_smp_wait_to_boot(int cpu)
145*4882a593Smuzhiyun {
146*4882a593Smuzhiyun /* for halt-on-reset, we've waited already */
147*4882a593Smuzhiyun if (IS_ENABLED(CONFIG_ARC_SMP_HALT_ON_RESET))
148*4882a593Smuzhiyun return;
149*4882a593Smuzhiyun
150*4882a593Smuzhiyun while (__boot_read(wake_flag) != cpu)
151*4882a593Smuzhiyun ;
152*4882a593Smuzhiyun
153*4882a593Smuzhiyun __boot_write(wake_flag, 0);
154*4882a593Smuzhiyun }
155*4882a593Smuzhiyun
arc_platform_smp_cpuinfo(void)156*4882a593Smuzhiyun const char *arc_platform_smp_cpuinfo(void)
157*4882a593Smuzhiyun {
158*4882a593Smuzhiyun return plat_smp_ops.info ? : "";
159*4882a593Smuzhiyun }
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun /*
162*4882a593Smuzhiyun * The very first "C" code executed by secondary
163*4882a593Smuzhiyun * Called from asm stub in head.S
164*4882a593Smuzhiyun * "current"/R25 already setup by low level boot code
165*4882a593Smuzhiyun */
start_kernel_secondary(void)166*4882a593Smuzhiyun void start_kernel_secondary(void)
167*4882a593Smuzhiyun {
168*4882a593Smuzhiyun struct mm_struct *mm = &init_mm;
169*4882a593Smuzhiyun unsigned int cpu = smp_processor_id();
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun /* MMU, Caches, Vector Table, Interrupts etc */
172*4882a593Smuzhiyun setup_processor();
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun mmget(mm);
175*4882a593Smuzhiyun mmgrab(mm);
176*4882a593Smuzhiyun current->active_mm = mm;
177*4882a593Smuzhiyun cpumask_set_cpu(cpu, mm_cpumask(mm));
178*4882a593Smuzhiyun
179*4882a593Smuzhiyun /* Some SMP H/w setup - for each cpu */
180*4882a593Smuzhiyun if (plat_smp_ops.init_per_cpu)
181*4882a593Smuzhiyun plat_smp_ops.init_per_cpu(cpu);
182*4882a593Smuzhiyun
183*4882a593Smuzhiyun if (machine_desc->init_per_cpu)
184*4882a593Smuzhiyun machine_desc->init_per_cpu(cpu);
185*4882a593Smuzhiyun
186*4882a593Smuzhiyun notify_cpu_starting(cpu);
187*4882a593Smuzhiyun set_cpu_online(cpu, true);
188*4882a593Smuzhiyun
189*4882a593Smuzhiyun pr_info("## CPU%u LIVE ##: Executing Code...\n", cpu);
190*4882a593Smuzhiyun
191*4882a593Smuzhiyun local_irq_enable();
192*4882a593Smuzhiyun cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
193*4882a593Smuzhiyun }
194*4882a593Smuzhiyun
195*4882a593Smuzhiyun /*
196*4882a593Smuzhiyun * Called from kernel_init( ) -> smp_init( ) - for each CPU
197*4882a593Smuzhiyun *
198*4882a593Smuzhiyun * At this point, Secondary Processor is "HALT"ed:
199*4882a593Smuzhiyun * -It booted, but was halted in head.S
200*4882a593Smuzhiyun * -It was configured to halt-on-reset
201*4882a593Smuzhiyun * So need to wake it up.
202*4882a593Smuzhiyun *
203*4882a593Smuzhiyun * Essential requirements being where to run from (PC) and stack (SP)
204*4882a593Smuzhiyun */
__cpu_up(unsigned int cpu,struct task_struct * idle)205*4882a593Smuzhiyun int __cpu_up(unsigned int cpu, struct task_struct *idle)
206*4882a593Smuzhiyun {
207*4882a593Smuzhiyun unsigned long wait_till;
208*4882a593Smuzhiyun
209*4882a593Smuzhiyun secondary_idle_tsk = idle;
210*4882a593Smuzhiyun
211*4882a593Smuzhiyun pr_info("Idle Task [%d] %p", cpu, idle);
212*4882a593Smuzhiyun pr_info("Trying to bring up CPU%u ...\n", cpu);
213*4882a593Smuzhiyun
214*4882a593Smuzhiyun if (plat_smp_ops.cpu_kick)
215*4882a593Smuzhiyun plat_smp_ops.cpu_kick(cpu,
216*4882a593Smuzhiyun (unsigned long)first_lines_of_secondary);
217*4882a593Smuzhiyun else
218*4882a593Smuzhiyun arc_default_smp_cpu_kick(cpu, (unsigned long)NULL);
219*4882a593Smuzhiyun
220*4882a593Smuzhiyun /* wait for 1 sec after kicking the secondary */
221*4882a593Smuzhiyun wait_till = jiffies + HZ;
222*4882a593Smuzhiyun while (time_before(jiffies, wait_till)) {
223*4882a593Smuzhiyun if (cpu_online(cpu))
224*4882a593Smuzhiyun break;
225*4882a593Smuzhiyun }
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun if (!cpu_online(cpu)) {
228*4882a593Smuzhiyun pr_info("Timeout: CPU%u FAILED to come up !!!\n", cpu);
229*4882a593Smuzhiyun return -1;
230*4882a593Smuzhiyun }
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun secondary_idle_tsk = NULL;
233*4882a593Smuzhiyun
234*4882a593Smuzhiyun return 0;
235*4882a593Smuzhiyun }
236*4882a593Smuzhiyun
237*4882a593Smuzhiyun /*
238*4882a593Smuzhiyun * not supported here
239*4882a593Smuzhiyun */
setup_profiling_timer(unsigned int multiplier)240*4882a593Smuzhiyun int setup_profiling_timer(unsigned int multiplier)
241*4882a593Smuzhiyun {
242*4882a593Smuzhiyun return -EINVAL;
243*4882a593Smuzhiyun }
244*4882a593Smuzhiyun
245*4882a593Smuzhiyun /*****************************************************************************/
246*4882a593Smuzhiyun /* Inter Processor Interrupt Handling */
247*4882a593Smuzhiyun /*****************************************************************************/
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun enum ipi_msg_type {
250*4882a593Smuzhiyun IPI_EMPTY = 0,
251*4882a593Smuzhiyun IPI_RESCHEDULE = 1,
252*4882a593Smuzhiyun IPI_CALL_FUNC,
253*4882a593Smuzhiyun IPI_CPU_STOP,
254*4882a593Smuzhiyun };
255*4882a593Smuzhiyun
256*4882a593Smuzhiyun /*
257*4882a593Smuzhiyun * In arches with IRQ for each msg type (above), receiver can use IRQ-id to
258*4882a593Smuzhiyun * figure out what msg was sent. For those which don't (ARC has dedicated IPI
259*4882a593Smuzhiyun * IRQ), the msg-type needs to be conveyed via per-cpu data
260*4882a593Smuzhiyun */
261*4882a593Smuzhiyun
262*4882a593Smuzhiyun static DEFINE_PER_CPU(unsigned long, ipi_data);
263*4882a593Smuzhiyun
ipi_send_msg_one(int cpu,enum ipi_msg_type msg)264*4882a593Smuzhiyun static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg)
265*4882a593Smuzhiyun {
266*4882a593Smuzhiyun unsigned long __percpu *ipi_data_ptr = per_cpu_ptr(&ipi_data, cpu);
267*4882a593Smuzhiyun unsigned long old, new;
268*4882a593Smuzhiyun unsigned long flags;
269*4882a593Smuzhiyun
270*4882a593Smuzhiyun pr_debug("%d Sending msg [%d] to %d\n", smp_processor_id(), msg, cpu);
271*4882a593Smuzhiyun
272*4882a593Smuzhiyun local_irq_save(flags);
273*4882a593Smuzhiyun
274*4882a593Smuzhiyun /*
275*4882a593Smuzhiyun * Atomically write new msg bit (in case others are writing too),
276*4882a593Smuzhiyun * and read back old value
277*4882a593Smuzhiyun */
278*4882a593Smuzhiyun do {
279*4882a593Smuzhiyun new = old = READ_ONCE(*ipi_data_ptr);
280*4882a593Smuzhiyun new |= 1U << msg;
281*4882a593Smuzhiyun } while (cmpxchg(ipi_data_ptr, old, new) != old);
282*4882a593Smuzhiyun
283*4882a593Smuzhiyun /*
284*4882a593Smuzhiyun * Call the platform specific IPI kick function, but avoid if possible:
285*4882a593Smuzhiyun * Only do so if there's no pending msg from other concurrent sender(s).
286*4882a593Smuzhiyun * Otherwise, recevier will see this msg as well when it takes the
287*4882a593Smuzhiyun * IPI corresponding to that msg. This is true, even if it is already in
288*4882a593Smuzhiyun * IPI handler, because !@old means it has not yet dequeued the msg(s)
289*4882a593Smuzhiyun * so @new msg can be a free-loader
290*4882a593Smuzhiyun */
291*4882a593Smuzhiyun if (plat_smp_ops.ipi_send && !old)
292*4882a593Smuzhiyun plat_smp_ops.ipi_send(cpu);
293*4882a593Smuzhiyun
294*4882a593Smuzhiyun local_irq_restore(flags);
295*4882a593Smuzhiyun }
296*4882a593Smuzhiyun
ipi_send_msg(const struct cpumask * callmap,enum ipi_msg_type msg)297*4882a593Smuzhiyun static void ipi_send_msg(const struct cpumask *callmap, enum ipi_msg_type msg)
298*4882a593Smuzhiyun {
299*4882a593Smuzhiyun unsigned int cpu;
300*4882a593Smuzhiyun
301*4882a593Smuzhiyun for_each_cpu(cpu, callmap)
302*4882a593Smuzhiyun ipi_send_msg_one(cpu, msg);
303*4882a593Smuzhiyun }
304*4882a593Smuzhiyun
smp_send_reschedule(int cpu)305*4882a593Smuzhiyun void smp_send_reschedule(int cpu)
306*4882a593Smuzhiyun {
307*4882a593Smuzhiyun ipi_send_msg_one(cpu, IPI_RESCHEDULE);
308*4882a593Smuzhiyun }
309*4882a593Smuzhiyun
smp_send_stop(void)310*4882a593Smuzhiyun void smp_send_stop(void)
311*4882a593Smuzhiyun {
312*4882a593Smuzhiyun struct cpumask targets;
313*4882a593Smuzhiyun cpumask_copy(&targets, cpu_online_mask);
314*4882a593Smuzhiyun cpumask_clear_cpu(smp_processor_id(), &targets);
315*4882a593Smuzhiyun ipi_send_msg(&targets, IPI_CPU_STOP);
316*4882a593Smuzhiyun }
317*4882a593Smuzhiyun
arch_send_call_function_single_ipi(int cpu)318*4882a593Smuzhiyun void arch_send_call_function_single_ipi(int cpu)
319*4882a593Smuzhiyun {
320*4882a593Smuzhiyun ipi_send_msg_one(cpu, IPI_CALL_FUNC);
321*4882a593Smuzhiyun }
322*4882a593Smuzhiyun
arch_send_call_function_ipi_mask(const struct cpumask * mask)323*4882a593Smuzhiyun void arch_send_call_function_ipi_mask(const struct cpumask *mask)
324*4882a593Smuzhiyun {
325*4882a593Smuzhiyun ipi_send_msg(mask, IPI_CALL_FUNC);
326*4882a593Smuzhiyun }
327*4882a593Smuzhiyun
328*4882a593Smuzhiyun /*
329*4882a593Smuzhiyun * ipi_cpu_stop - handle IPI from smp_send_stop()
330*4882a593Smuzhiyun */
ipi_cpu_stop(void)331*4882a593Smuzhiyun static void ipi_cpu_stop(void)
332*4882a593Smuzhiyun {
333*4882a593Smuzhiyun machine_halt();
334*4882a593Smuzhiyun }
335*4882a593Smuzhiyun
__do_IPI(unsigned long msg)336*4882a593Smuzhiyun static inline int __do_IPI(unsigned long msg)
337*4882a593Smuzhiyun {
338*4882a593Smuzhiyun int rc = 0;
339*4882a593Smuzhiyun
340*4882a593Smuzhiyun switch (msg) {
341*4882a593Smuzhiyun case IPI_RESCHEDULE:
342*4882a593Smuzhiyun scheduler_ipi();
343*4882a593Smuzhiyun break;
344*4882a593Smuzhiyun
345*4882a593Smuzhiyun case IPI_CALL_FUNC:
346*4882a593Smuzhiyun generic_smp_call_function_interrupt();
347*4882a593Smuzhiyun break;
348*4882a593Smuzhiyun
349*4882a593Smuzhiyun case IPI_CPU_STOP:
350*4882a593Smuzhiyun ipi_cpu_stop();
351*4882a593Smuzhiyun break;
352*4882a593Smuzhiyun
353*4882a593Smuzhiyun default:
354*4882a593Smuzhiyun rc = 1;
355*4882a593Smuzhiyun }
356*4882a593Smuzhiyun
357*4882a593Smuzhiyun return rc;
358*4882a593Smuzhiyun }
359*4882a593Smuzhiyun
360*4882a593Smuzhiyun /*
361*4882a593Smuzhiyun * arch-common ISR to handle for inter-processor interrupts
362*4882a593Smuzhiyun * Has hooks for platform specific IPI
363*4882a593Smuzhiyun */
do_IPI(int irq,void * dev_id)364*4882a593Smuzhiyun irqreturn_t do_IPI(int irq, void *dev_id)
365*4882a593Smuzhiyun {
366*4882a593Smuzhiyun unsigned long pending;
367*4882a593Smuzhiyun unsigned long __maybe_unused copy;
368*4882a593Smuzhiyun
369*4882a593Smuzhiyun pr_debug("IPI [%ld] received on cpu %d\n",
370*4882a593Smuzhiyun *this_cpu_ptr(&ipi_data), smp_processor_id());
371*4882a593Smuzhiyun
372*4882a593Smuzhiyun if (plat_smp_ops.ipi_clear)
373*4882a593Smuzhiyun plat_smp_ops.ipi_clear(irq);
374*4882a593Smuzhiyun
375*4882a593Smuzhiyun /*
376*4882a593Smuzhiyun * "dequeue" the msg corresponding to this IPI (and possibly other
377*4882a593Smuzhiyun * piggybacked msg from elided IPIs: see ipi_send_msg_one() above)
378*4882a593Smuzhiyun */
379*4882a593Smuzhiyun copy = pending = xchg(this_cpu_ptr(&ipi_data), 0);
380*4882a593Smuzhiyun
381*4882a593Smuzhiyun do {
382*4882a593Smuzhiyun unsigned long msg = __ffs(pending);
383*4882a593Smuzhiyun int rc;
384*4882a593Smuzhiyun
385*4882a593Smuzhiyun rc = __do_IPI(msg);
386*4882a593Smuzhiyun if (rc)
387*4882a593Smuzhiyun pr_info("IPI with bogus msg %ld in %ld\n", msg, copy);
388*4882a593Smuzhiyun pending &= ~(1U << msg);
389*4882a593Smuzhiyun } while (pending);
390*4882a593Smuzhiyun
391*4882a593Smuzhiyun return IRQ_HANDLED;
392*4882a593Smuzhiyun }
393*4882a593Smuzhiyun
394*4882a593Smuzhiyun /*
395*4882a593Smuzhiyun * API called by platform code to hookup arch-common ISR to their IPI IRQ
396*4882a593Smuzhiyun *
397*4882a593Smuzhiyun * Note: If IPI is provided by platform (vs. say ARC MCIP), their intc setup/map
398*4882a593Smuzhiyun * function needs to call call irq_set_percpu_devid() for IPI IRQ, otherwise
399*4882a593Smuzhiyun * request_percpu_irq() below will fail
400*4882a593Smuzhiyun */
401*4882a593Smuzhiyun static DEFINE_PER_CPU(int, ipi_dev);
402*4882a593Smuzhiyun
smp_ipi_irq_setup(int cpu,irq_hw_number_t hwirq)403*4882a593Smuzhiyun int smp_ipi_irq_setup(int cpu, irq_hw_number_t hwirq)
404*4882a593Smuzhiyun {
405*4882a593Smuzhiyun int *dev = per_cpu_ptr(&ipi_dev, cpu);
406*4882a593Smuzhiyun unsigned int virq = irq_find_mapping(NULL, hwirq);
407*4882a593Smuzhiyun
408*4882a593Smuzhiyun if (!virq)
409*4882a593Smuzhiyun panic("Cannot find virq for root domain and hwirq=%lu", hwirq);
410*4882a593Smuzhiyun
411*4882a593Smuzhiyun /* Boot cpu calls request, all call enable */
412*4882a593Smuzhiyun if (!cpu) {
413*4882a593Smuzhiyun int rc;
414*4882a593Smuzhiyun
415*4882a593Smuzhiyun rc = request_percpu_irq(virq, do_IPI, "IPI Interrupt", dev);
416*4882a593Smuzhiyun if (rc)
417*4882a593Smuzhiyun panic("Percpu IRQ request failed for %u\n", virq);
418*4882a593Smuzhiyun }
419*4882a593Smuzhiyun
420*4882a593Smuzhiyun enable_percpu_irq(virq, 0);
421*4882a593Smuzhiyun
422*4882a593Smuzhiyun return 0;
423*4882a593Smuzhiyun }
424