xref: /OK3568_Linux_fs/kernel/arch/arc/include/asm/disasm.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0-only */
2*4882a593Smuzhiyun /*
3*4882a593Smuzhiyun  * several functions that help interpret ARC instructions
4*4882a593Smuzhiyun  * used for unaligned accesses, kprobes and kgdb
5*4882a593Smuzhiyun  *
6*4882a593Smuzhiyun  * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
7*4882a593Smuzhiyun  */
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun #ifndef __ARC_DISASM_H__
10*4882a593Smuzhiyun #define __ARC_DISASM_H__
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun enum {
13*4882a593Smuzhiyun 	op_Bcc = 0, op_BLcc = 1, op_LD = 2, op_ST = 3, op_MAJOR_4 = 4,
14*4882a593Smuzhiyun 	op_MAJOR_5 = 5, op_LD_ADD = 12, op_ADD_SUB_SHIFT = 13,
15*4882a593Smuzhiyun 	op_ADD_MOV_CMP = 14, op_S = 15, op_LD_S = 16, op_LDB_S = 17,
16*4882a593Smuzhiyun 	op_LDW_S = 18, op_LDWX_S = 19, op_ST_S = 20, op_STB_S = 21,
17*4882a593Smuzhiyun 	op_STW_S = 22, op_Su5 = 23, op_SP = 24, op_GP = 25,
18*4882a593Smuzhiyun 	op_Pcl = 26, op_MOV_S = 27, op_ADD_CMP = 28, op_BR_S = 29,
19*4882a593Smuzhiyun 	op_B_S = 30, op_BL_S = 31
20*4882a593Smuzhiyun };
21*4882a593Smuzhiyun 
22*4882a593Smuzhiyun enum flow {
23*4882a593Smuzhiyun 	noflow,
24*4882a593Smuzhiyun 	direct_jump,
25*4882a593Smuzhiyun 	direct_call,
26*4882a593Smuzhiyun 	indirect_jump,
27*4882a593Smuzhiyun 	indirect_call,
28*4882a593Smuzhiyun 	invalid_instr
29*4882a593Smuzhiyun };
30*4882a593Smuzhiyun 
31*4882a593Smuzhiyun #define IS_BIT(word, n)		((word) & (1<<n))
32*4882a593Smuzhiyun #define BITS(word, s, e)	(((word) >> (s)) & (~((-2) << ((e) - (s)))))
33*4882a593Smuzhiyun 
34*4882a593Smuzhiyun #define MAJOR_OPCODE(word)	(BITS((word), 27, 31))
35*4882a593Smuzhiyun #define MINOR_OPCODE(word)	(BITS((word), 16, 21))
36*4882a593Smuzhiyun #define FIELD_A(word)		(BITS((word), 0, 5))
37*4882a593Smuzhiyun #define FIELD_B(word)		((BITS((word), 12, 14)<<3) | \
38*4882a593Smuzhiyun 				(BITS((word), 24, 26)))
39*4882a593Smuzhiyun #define FIELD_C(word)		(BITS((word), 6, 11))
40*4882a593Smuzhiyun #define FIELD_u6(word)		FIELDC(word)
41*4882a593Smuzhiyun #define FIELD_s12(word)		sign_extend(((BITS((word), 0, 5) << 6) | \
42*4882a593Smuzhiyun 					BITS((word), 6, 11)), 12)
43*4882a593Smuzhiyun 
44*4882a593Smuzhiyun /* note that for BL/BRcc these two macro's need another AND statement to mask
45*4882a593Smuzhiyun  * out bit 1 (make the result a multiple of 4) */
46*4882a593Smuzhiyun #define FIELD_s9(word)		sign_extend(((BITS(word, 15, 15) << 8) | \
47*4882a593Smuzhiyun 					BITS(word, 16, 23)), 9)
48*4882a593Smuzhiyun #define FIELD_s21(word)		sign_extend(((BITS(word, 6, 15) << 11) | \
49*4882a593Smuzhiyun 					(BITS(word, 17, 26) << 1)), 12)
50*4882a593Smuzhiyun #define FIELD_s25(word)		sign_extend(((BITS(word, 0, 3) << 21) | \
51*4882a593Smuzhiyun 					(BITS(word, 6, 15) << 11) | \
52*4882a593Smuzhiyun 					(BITS(word, 17, 26) << 1)), 12)
53*4882a593Smuzhiyun 
54*4882a593Smuzhiyun /* note: these operate on 16 bits! */
55*4882a593Smuzhiyun #define FIELD_S_A(word)		((BITS((word), 2, 2)<<3) | BITS((word), 0, 2))
56*4882a593Smuzhiyun #define FIELD_S_B(word)		((BITS((word), 10, 10)<<3) | \
57*4882a593Smuzhiyun 				BITS((word), 8, 10))
58*4882a593Smuzhiyun #define FIELD_S_C(word)		((BITS((word), 7, 7)<<3) | BITS((word), 5, 7))
59*4882a593Smuzhiyun #define FIELD_S_H(word)		((BITS((word), 0, 2)<<3) | BITS((word), 5, 8))
60*4882a593Smuzhiyun #define FIELD_S_u5(word)	(BITS((word), 0, 4))
61*4882a593Smuzhiyun #define FIELD_S_u6(word)	(BITS((word), 0, 4) << 1)
62*4882a593Smuzhiyun #define FIELD_S_u7(word)	(BITS((word), 0, 4) << 2)
63*4882a593Smuzhiyun #define FIELD_S_u10(word)	(BITS((word), 0, 7) << 2)
64*4882a593Smuzhiyun #define FIELD_S_s7(word)	sign_extend(BITS((word), 0, 5) << 1, 9)
65*4882a593Smuzhiyun #define FIELD_S_s8(word)	sign_extend(BITS((word), 0, 7) << 1, 9)
66*4882a593Smuzhiyun #define FIELD_S_s9(word)	sign_extend(BITS((word), 0, 8), 9)
67*4882a593Smuzhiyun #define FIELD_S_s10(word)	sign_extend(BITS((word), 0, 8) << 1, 10)
68*4882a593Smuzhiyun #define FIELD_S_s11(word)	sign_extend(BITS((word), 0, 8) << 2, 11)
69*4882a593Smuzhiyun #define FIELD_S_s13(word)	sign_extend(BITS((word), 0, 10) << 2, 13)
70*4882a593Smuzhiyun 
71*4882a593Smuzhiyun #define STATUS32_L		0x00000100
72*4882a593Smuzhiyun #define REG_LIMM		62
73*4882a593Smuzhiyun 
74*4882a593Smuzhiyun struct disasm_state {
75*4882a593Smuzhiyun 	/* generic info */
76*4882a593Smuzhiyun 	unsigned long words[2];
77*4882a593Smuzhiyun 	int instr_len;
78*4882a593Smuzhiyun 	int major_opcode;
79*4882a593Smuzhiyun 	/* info for branch/jump */
80*4882a593Smuzhiyun 	int is_branch;
81*4882a593Smuzhiyun 	int target;
82*4882a593Smuzhiyun 	int delay_slot;
83*4882a593Smuzhiyun 	enum flow flow;
84*4882a593Smuzhiyun 	/* info for load/store */
85*4882a593Smuzhiyun 	int src1, src2, src3, dest, wb_reg;
86*4882a593Smuzhiyun 	int zz, aa, x, pref, di;
87*4882a593Smuzhiyun 	int fault, write;
88*4882a593Smuzhiyun };
89*4882a593Smuzhiyun 
sign_extend(int value,int bits)90*4882a593Smuzhiyun static inline int sign_extend(int value, int bits)
91*4882a593Smuzhiyun {
92*4882a593Smuzhiyun 	if (IS_BIT(value, (bits - 1)))
93*4882a593Smuzhiyun 		value |= (0xffffffff << bits);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun 	return value;
96*4882a593Smuzhiyun }
97*4882a593Smuzhiyun 
is_short_instr(unsigned long addr)98*4882a593Smuzhiyun static inline int is_short_instr(unsigned long addr)
99*4882a593Smuzhiyun {
100*4882a593Smuzhiyun 	uint16_t word = *((uint16_t *)addr);
101*4882a593Smuzhiyun 	int opcode = (word >> 11) & 0x1F;
102*4882a593Smuzhiyun 	return (opcode >= 0x0B);
103*4882a593Smuzhiyun }
104*4882a593Smuzhiyun 
105*4882a593Smuzhiyun void disasm_instr(unsigned long addr, struct disasm_state *state,
106*4882a593Smuzhiyun 	int userspace, struct pt_regs *regs, struct callee_regs *cregs);
107*4882a593Smuzhiyun int disasm_next_pc(unsigned long pc, struct pt_regs *regs, struct callee_regs
108*4882a593Smuzhiyun 	*cregs, unsigned long *fall_thru, unsigned long *target);
109*4882a593Smuzhiyun long get_reg(int reg, struct pt_regs *regs, struct callee_regs *cregs);
110*4882a593Smuzhiyun void set_reg(int reg, long val, struct pt_regs *regs,
111*4882a593Smuzhiyun 		struct callee_regs *cregs);
112*4882a593Smuzhiyun 
113*4882a593Smuzhiyun #endif	/* __ARC_DISASM_H__ */
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