xref: /OK3568_Linux_fs/kernel/arch/arc/boot/dts/nsim_700.dts (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun// SPDX-License-Identifier: GPL-2.0-only
2*4882a593Smuzhiyun/*
3*4882a593Smuzhiyun * Copyright (C) 2012 Synopsys, Inc. (www.synopsys.com)
4*4882a593Smuzhiyun */
5*4882a593Smuzhiyun/dts-v1/;
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun/include/ "skeleton.dtsi"
8*4882a593Smuzhiyun
9*4882a593Smuzhiyun/ {
10*4882a593Smuzhiyun	model = "snps,nsim";
11*4882a593Smuzhiyun	compatible = "snps,nsim";
12*4882a593Smuzhiyun	#address-cells = <1>;
13*4882a593Smuzhiyun	#size-cells = <1>;
14*4882a593Smuzhiyun	interrupt-parent = <&core_intc>;
15*4882a593Smuzhiyun
16*4882a593Smuzhiyun	chosen {
17*4882a593Smuzhiyun		bootargs = "earlycon=uart8250,mmio32,0xf0000000,115200n8 console=ttyS0,115200n8 print-fatal-signals=1";
18*4882a593Smuzhiyun	};
19*4882a593Smuzhiyun
20*4882a593Smuzhiyun	aliases {
21*4882a593Smuzhiyun		serial0 = &uart0;
22*4882a593Smuzhiyun	};
23*4882a593Smuzhiyun
24*4882a593Smuzhiyun	fpga {
25*4882a593Smuzhiyun		compatible = "simple-bus";
26*4882a593Smuzhiyun		#address-cells = <1>;
27*4882a593Smuzhiyun		#size-cells = <1>;
28*4882a593Smuzhiyun
29*4882a593Smuzhiyun		/* child and parent address space 1:1 mapped */
30*4882a593Smuzhiyun		ranges;
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun		core_clk: core_clk {
33*4882a593Smuzhiyun			#clock-cells = <0>;
34*4882a593Smuzhiyun			compatible = "fixed-clock";
35*4882a593Smuzhiyun			clock-frequency = <80000000>;
36*4882a593Smuzhiyun		};
37*4882a593Smuzhiyun
38*4882a593Smuzhiyun		core_intc: interrupt-controller {
39*4882a593Smuzhiyun			compatible = "snps,arc700-intc";
40*4882a593Smuzhiyun			interrupt-controller;
41*4882a593Smuzhiyun			#interrupt-cells = <1>;
42*4882a593Smuzhiyun		};
43*4882a593Smuzhiyun
44*4882a593Smuzhiyun		uart0: serial@f0000000 {
45*4882a593Smuzhiyun			compatible = "ns16550a";
46*4882a593Smuzhiyun			reg = <0xf0000000 0x2000>;
47*4882a593Smuzhiyun			interrupts = <24>;
48*4882a593Smuzhiyun			clock-frequency = <50000000>;
49*4882a593Smuzhiyun			baud = <115200>;
50*4882a593Smuzhiyun			reg-shift = <2>;
51*4882a593Smuzhiyun			reg-io-width = <4>;
52*4882a593Smuzhiyun			no-loopback-test = <1>;
53*4882a593Smuzhiyun		};
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun		arcpct0: pct {
56*4882a593Smuzhiyun			compatible = "snps,arc700-pct";
57*4882a593Smuzhiyun		};
58*4882a593Smuzhiyun	};
59*4882a593Smuzhiyun};
60