xref: /OK3568_Linux_fs/kernel/arch/alpha/include/asm/pal.h (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef __ALPHA_PAL_H
3*4882a593Smuzhiyun #define __ALPHA_PAL_H
4*4882a593Smuzhiyun 
5*4882a593Smuzhiyun #include <uapi/asm/pal.h>
6*4882a593Smuzhiyun 
7*4882a593Smuzhiyun #ifndef __ASSEMBLY__
8*4882a593Smuzhiyun 
9*4882a593Smuzhiyun extern void halt(void) __attribute__((noreturn));
10*4882a593Smuzhiyun #define __halt() __asm__ __volatile__ ("call_pal %0 #halt" : : "i" (PAL_halt))
11*4882a593Smuzhiyun 
12*4882a593Smuzhiyun #define imb() \
13*4882a593Smuzhiyun __asm__ __volatile__ ("call_pal %0 #imb" : : "i" (PAL_imb) : "memory")
14*4882a593Smuzhiyun 
15*4882a593Smuzhiyun #define draina() \
16*4882a593Smuzhiyun __asm__ __volatile__ ("call_pal %0 #draina" : : "i" (PAL_draina) : "memory")
17*4882a593Smuzhiyun 
18*4882a593Smuzhiyun #define __CALL_PAL_R0(NAME, TYPE)				\
19*4882a593Smuzhiyun extern inline TYPE NAME(void)					\
20*4882a593Smuzhiyun {								\
21*4882a593Smuzhiyun 	register TYPE __r0 __asm__("$0");			\
22*4882a593Smuzhiyun 	__asm__ __volatile__(					\
23*4882a593Smuzhiyun 		"call_pal %1 # " #NAME				\
24*4882a593Smuzhiyun 		:"=r" (__r0)					\
25*4882a593Smuzhiyun 		:"i" (PAL_ ## NAME)				\
26*4882a593Smuzhiyun 		:"$1", "$16", "$22", "$23", "$24", "$25");	\
27*4882a593Smuzhiyun 	return __r0;						\
28*4882a593Smuzhiyun }
29*4882a593Smuzhiyun 
30*4882a593Smuzhiyun #define __CALL_PAL_W1(NAME, TYPE0)				\
31*4882a593Smuzhiyun extern inline void NAME(TYPE0 arg0)				\
32*4882a593Smuzhiyun {								\
33*4882a593Smuzhiyun 	register TYPE0 __r16 __asm__("$16") = arg0;		\
34*4882a593Smuzhiyun 	__asm__ __volatile__(					\
35*4882a593Smuzhiyun 		"call_pal %1 # "#NAME				\
36*4882a593Smuzhiyun 		: "=r"(__r16)					\
37*4882a593Smuzhiyun 		: "i"(PAL_ ## NAME), "0"(__r16)			\
38*4882a593Smuzhiyun 		: "$1", "$22", "$23", "$24", "$25");		\
39*4882a593Smuzhiyun }
40*4882a593Smuzhiyun 
41*4882a593Smuzhiyun #define __CALL_PAL_W2(NAME, TYPE0, TYPE1)			\
42*4882a593Smuzhiyun extern inline void NAME(TYPE0 arg0, TYPE1 arg1)			\
43*4882a593Smuzhiyun {								\
44*4882a593Smuzhiyun 	register TYPE0 __r16 __asm__("$16") = arg0;		\
45*4882a593Smuzhiyun 	register TYPE1 __r17 __asm__("$17") = arg1;		\
46*4882a593Smuzhiyun 	__asm__ __volatile__(					\
47*4882a593Smuzhiyun 		"call_pal %2 # "#NAME				\
48*4882a593Smuzhiyun 		: "=r"(__r16), "=r"(__r17)			\
49*4882a593Smuzhiyun 		: "i"(PAL_ ## NAME), "0"(__r16), "1"(__r17)	\
50*4882a593Smuzhiyun 		: "$1", "$22", "$23", "$24", "$25");		\
51*4882a593Smuzhiyun }
52*4882a593Smuzhiyun 
53*4882a593Smuzhiyun #define __CALL_PAL_RW1(NAME, RTYPE, TYPE0)			\
54*4882a593Smuzhiyun extern inline RTYPE NAME(TYPE0 arg0)				\
55*4882a593Smuzhiyun {								\
56*4882a593Smuzhiyun 	register RTYPE __r0 __asm__("$0");			\
57*4882a593Smuzhiyun 	register TYPE0 __r16 __asm__("$16") = arg0;		\
58*4882a593Smuzhiyun 	__asm__ __volatile__(					\
59*4882a593Smuzhiyun 		"call_pal %2 # "#NAME				\
60*4882a593Smuzhiyun 		: "=r"(__r16), "=r"(__r0)			\
61*4882a593Smuzhiyun 		: "i"(PAL_ ## NAME), "0"(__r16)			\
62*4882a593Smuzhiyun 		: "$1", "$22", "$23", "$24", "$25");		\
63*4882a593Smuzhiyun 	return __r0;						\
64*4882a593Smuzhiyun }
65*4882a593Smuzhiyun 
66*4882a593Smuzhiyun #define __CALL_PAL_RW2(NAME, RTYPE, TYPE0, TYPE1)		\
67*4882a593Smuzhiyun extern inline RTYPE NAME(TYPE0 arg0, TYPE1 arg1)		\
68*4882a593Smuzhiyun {								\
69*4882a593Smuzhiyun 	register RTYPE __r0 __asm__("$0");			\
70*4882a593Smuzhiyun 	register TYPE0 __r16 __asm__("$16") = arg0;		\
71*4882a593Smuzhiyun 	register TYPE1 __r17 __asm__("$17") = arg1;		\
72*4882a593Smuzhiyun 	__asm__ __volatile__(					\
73*4882a593Smuzhiyun 		"call_pal %3 # "#NAME				\
74*4882a593Smuzhiyun 		: "=r"(__r16), "=r"(__r17), "=r"(__r0)		\
75*4882a593Smuzhiyun 		: "i"(PAL_ ## NAME), "0"(__r16), "1"(__r17)	\
76*4882a593Smuzhiyun 		: "$1", "$22", "$23", "$24", "$25");		\
77*4882a593Smuzhiyun 	return __r0;						\
78*4882a593Smuzhiyun }
79*4882a593Smuzhiyun 
80*4882a593Smuzhiyun __CALL_PAL_W1(cflush, unsigned long);
81*4882a593Smuzhiyun __CALL_PAL_R0(rdmces, unsigned long);
82*4882a593Smuzhiyun __CALL_PAL_R0(rdps, unsigned long);
83*4882a593Smuzhiyun __CALL_PAL_R0(rdusp, unsigned long);
84*4882a593Smuzhiyun __CALL_PAL_RW1(swpipl, unsigned long, unsigned long);
85*4882a593Smuzhiyun __CALL_PAL_R0(whami, unsigned long);
86*4882a593Smuzhiyun __CALL_PAL_W2(wrent, void*, unsigned long);
87*4882a593Smuzhiyun __CALL_PAL_W1(wripir, unsigned long);
88*4882a593Smuzhiyun __CALL_PAL_W1(wrkgp, unsigned long);
89*4882a593Smuzhiyun __CALL_PAL_W1(wrmces, unsigned long);
90*4882a593Smuzhiyun __CALL_PAL_RW2(wrperfmon, unsigned long, unsigned long, unsigned long);
91*4882a593Smuzhiyun __CALL_PAL_W1(wrusp, unsigned long);
92*4882a593Smuzhiyun __CALL_PAL_W1(wrvptptr, unsigned long);
93*4882a593Smuzhiyun __CALL_PAL_RW1(wtint, unsigned long, unsigned long);
94*4882a593Smuzhiyun 
95*4882a593Smuzhiyun /*
96*4882a593Smuzhiyun  * TB routines..
97*4882a593Smuzhiyun  */
98*4882a593Smuzhiyun #define __tbi(nr,arg,arg1...)					\
99*4882a593Smuzhiyun ({								\
100*4882a593Smuzhiyun 	register unsigned long __r16 __asm__("$16") = (nr);	\
101*4882a593Smuzhiyun 	register unsigned long __r17 __asm__("$17"); arg;	\
102*4882a593Smuzhiyun 	__asm__ __volatile__(					\
103*4882a593Smuzhiyun 		"call_pal %3 #__tbi"				\
104*4882a593Smuzhiyun 		:"=r" (__r16),"=r" (__r17)			\
105*4882a593Smuzhiyun 		:"0" (__r16),"i" (PAL_tbi) ,##arg1		\
106*4882a593Smuzhiyun 		:"$0", "$1", "$22", "$23", "$24", "$25");	\
107*4882a593Smuzhiyun })
108*4882a593Smuzhiyun 
109*4882a593Smuzhiyun #define tbi(x,y)	__tbi(x,__r17=(y),"1" (__r17))
110*4882a593Smuzhiyun #define tbisi(x)	__tbi(1,__r17=(x),"1" (__r17))
111*4882a593Smuzhiyun #define tbisd(x)	__tbi(2,__r17=(x),"1" (__r17))
112*4882a593Smuzhiyun #define tbis(x)		__tbi(3,__r17=(x),"1" (__r17))
113*4882a593Smuzhiyun #define tbiap()		__tbi(-1, /* no second argument */)
114*4882a593Smuzhiyun #define tbia()		__tbi(-2, /* no second argument */)
115*4882a593Smuzhiyun 
116*4882a593Smuzhiyun /*
117*4882a593Smuzhiyun  * QEMU Cserv routines..
118*4882a593Smuzhiyun  */
119*4882a593Smuzhiyun 
120*4882a593Smuzhiyun static inline unsigned long
qemu_get_walltime(void)121*4882a593Smuzhiyun qemu_get_walltime(void)
122*4882a593Smuzhiyun {
123*4882a593Smuzhiyun 	register unsigned long v0 __asm__("$0");
124*4882a593Smuzhiyun 	register unsigned long a0 __asm__("$16") = 3;
125*4882a593Smuzhiyun 
126*4882a593Smuzhiyun 	asm("call_pal %2 # cserve get_time"
127*4882a593Smuzhiyun 	    : "=r"(v0), "+r"(a0)
128*4882a593Smuzhiyun 	    : "i"(PAL_cserve)
129*4882a593Smuzhiyun 	    : "$17", "$18", "$19", "$20", "$21");
130*4882a593Smuzhiyun 
131*4882a593Smuzhiyun 	return v0;
132*4882a593Smuzhiyun }
133*4882a593Smuzhiyun 
134*4882a593Smuzhiyun static inline unsigned long
qemu_get_alarm(void)135*4882a593Smuzhiyun qemu_get_alarm(void)
136*4882a593Smuzhiyun {
137*4882a593Smuzhiyun 	register unsigned long v0 __asm__("$0");
138*4882a593Smuzhiyun 	register unsigned long a0 __asm__("$16") = 4;
139*4882a593Smuzhiyun 
140*4882a593Smuzhiyun 	asm("call_pal %2 # cserve get_alarm"
141*4882a593Smuzhiyun 	    : "=r"(v0), "+r"(a0)
142*4882a593Smuzhiyun 	    : "i"(PAL_cserve)
143*4882a593Smuzhiyun 	    : "$17", "$18", "$19", "$20", "$21");
144*4882a593Smuzhiyun 
145*4882a593Smuzhiyun 	return v0;
146*4882a593Smuzhiyun }
147*4882a593Smuzhiyun 
148*4882a593Smuzhiyun static inline void
qemu_set_alarm_rel(unsigned long expire)149*4882a593Smuzhiyun qemu_set_alarm_rel(unsigned long expire)
150*4882a593Smuzhiyun {
151*4882a593Smuzhiyun 	register unsigned long a0 __asm__("$16") = 5;
152*4882a593Smuzhiyun 	register unsigned long a1 __asm__("$17") = expire;
153*4882a593Smuzhiyun 
154*4882a593Smuzhiyun 	asm volatile("call_pal %2 # cserve set_alarm_rel"
155*4882a593Smuzhiyun 		     : "+r"(a0), "+r"(a1)
156*4882a593Smuzhiyun 		     : "i"(PAL_cserve)
157*4882a593Smuzhiyun 		     : "$0", "$18", "$19", "$20", "$21");
158*4882a593Smuzhiyun }
159*4882a593Smuzhiyun 
160*4882a593Smuzhiyun static inline void
qemu_set_alarm_abs(unsigned long expire)161*4882a593Smuzhiyun qemu_set_alarm_abs(unsigned long expire)
162*4882a593Smuzhiyun {
163*4882a593Smuzhiyun 	register unsigned long a0 __asm__("$16") = 6;
164*4882a593Smuzhiyun 	register unsigned long a1 __asm__("$17") = expire;
165*4882a593Smuzhiyun 
166*4882a593Smuzhiyun 	asm volatile("call_pal %2 # cserve set_alarm_abs"
167*4882a593Smuzhiyun 		     : "+r"(a0), "+r"(a1)
168*4882a593Smuzhiyun 		     : "i"(PAL_cserve)
169*4882a593Smuzhiyun 		     : "$0", "$18", "$19", "$20", "$21");
170*4882a593Smuzhiyun }
171*4882a593Smuzhiyun 
172*4882a593Smuzhiyun static inline unsigned long
qemu_get_vmtime(void)173*4882a593Smuzhiyun qemu_get_vmtime(void)
174*4882a593Smuzhiyun {
175*4882a593Smuzhiyun 	register unsigned long v0 __asm__("$0");
176*4882a593Smuzhiyun 	register unsigned long a0 __asm__("$16") = 7;
177*4882a593Smuzhiyun 
178*4882a593Smuzhiyun 	asm("call_pal %2 # cserve get_time"
179*4882a593Smuzhiyun 	    : "=r"(v0), "+r"(a0)
180*4882a593Smuzhiyun 	    : "i"(PAL_cserve)
181*4882a593Smuzhiyun 	    : "$17", "$18", "$19", "$20", "$21");
182*4882a593Smuzhiyun 
183*4882a593Smuzhiyun 	return v0;
184*4882a593Smuzhiyun }
185*4882a593Smuzhiyun 
186*4882a593Smuzhiyun #endif /* !__ASSEMBLY__ */
187*4882a593Smuzhiyun #endif /* __ALPHA_PAL_H */
188