1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * Machine dependent access functions for RTC registers. 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun #ifndef __ASM_ALPHA_MC146818RTC_H 6*4882a593Smuzhiyun #define __ASM_ALPHA_MC146818RTC_H 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun #include <asm/io.h> 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun #ifndef RTC_PORT 11*4882a593Smuzhiyun #define RTC_PORT(x) (0x70 + (x)) 12*4882a593Smuzhiyun #define RTC_ALWAYS_BCD 1 /* RTC operates in binary mode */ 13*4882a593Smuzhiyun #endif 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun /* 16*4882a593Smuzhiyun * The yet supported machines all access the RTC index register via 17*4882a593Smuzhiyun * an ISA port access but the way to access the date register differs ... 18*4882a593Smuzhiyun */ 19*4882a593Smuzhiyun #define CMOS_READ(addr) ({ \ 20*4882a593Smuzhiyun outb_p((addr),RTC_PORT(0)); \ 21*4882a593Smuzhiyun inb_p(RTC_PORT(1)); \ 22*4882a593Smuzhiyun }) 23*4882a593Smuzhiyun #define CMOS_WRITE(val, addr) ({ \ 24*4882a593Smuzhiyun outb_p((addr),RTC_PORT(0)); \ 25*4882a593Smuzhiyun outb_p((val),RTC_PORT(1)); \ 26*4882a593Smuzhiyun }) 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun #endif /* __ASM_ALPHA_MC146818RTC_H */ 29