1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */
2*4882a593Smuzhiyun #ifndef _ASM_ALPHA_FUTEX_H
3*4882a593Smuzhiyun #define _ASM_ALPHA_FUTEX_H
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun #ifdef __KERNEL__
6*4882a593Smuzhiyun
7*4882a593Smuzhiyun #include <linux/futex.h>
8*4882a593Smuzhiyun #include <linux/uaccess.h>
9*4882a593Smuzhiyun #include <asm/errno.h>
10*4882a593Smuzhiyun #include <asm/barrier.h>
11*4882a593Smuzhiyun
12*4882a593Smuzhiyun #define __futex_atomic_op(insn, ret, oldval, uaddr, oparg) \
13*4882a593Smuzhiyun __asm__ __volatile__( \
14*4882a593Smuzhiyun __ASM_SMP_MB \
15*4882a593Smuzhiyun "1: ldl_l %0,0(%2)\n" \
16*4882a593Smuzhiyun insn \
17*4882a593Smuzhiyun "2: stl_c %1,0(%2)\n" \
18*4882a593Smuzhiyun " beq %1,4f\n" \
19*4882a593Smuzhiyun " mov $31,%1\n" \
20*4882a593Smuzhiyun "3: .subsection 2\n" \
21*4882a593Smuzhiyun "4: br 1b\n" \
22*4882a593Smuzhiyun " .previous\n" \
23*4882a593Smuzhiyun EXC(1b,3b,$31,%1) \
24*4882a593Smuzhiyun EXC(2b,3b,$31,%1) \
25*4882a593Smuzhiyun : "=&r" (oldval), "=&r"(ret) \
26*4882a593Smuzhiyun : "r" (uaddr), "r"(oparg) \
27*4882a593Smuzhiyun : "memory")
28*4882a593Smuzhiyun
arch_futex_atomic_op_inuser(int op,int oparg,int * oval,u32 __user * uaddr)29*4882a593Smuzhiyun static inline int arch_futex_atomic_op_inuser(int op, int oparg, int *oval,
30*4882a593Smuzhiyun u32 __user *uaddr)
31*4882a593Smuzhiyun {
32*4882a593Smuzhiyun int oldval = 0, ret;
33*4882a593Smuzhiyun
34*4882a593Smuzhiyun if (!access_ok(uaddr, sizeof(u32)))
35*4882a593Smuzhiyun return -EFAULT;
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun switch (op) {
38*4882a593Smuzhiyun case FUTEX_OP_SET:
39*4882a593Smuzhiyun __futex_atomic_op("mov %3,%1\n", ret, oldval, uaddr, oparg);
40*4882a593Smuzhiyun break;
41*4882a593Smuzhiyun case FUTEX_OP_ADD:
42*4882a593Smuzhiyun __futex_atomic_op("addl %0,%3,%1\n", ret, oldval, uaddr, oparg);
43*4882a593Smuzhiyun break;
44*4882a593Smuzhiyun case FUTEX_OP_OR:
45*4882a593Smuzhiyun __futex_atomic_op("or %0,%3,%1\n", ret, oldval, uaddr, oparg);
46*4882a593Smuzhiyun break;
47*4882a593Smuzhiyun case FUTEX_OP_ANDN:
48*4882a593Smuzhiyun __futex_atomic_op("andnot %0,%3,%1\n", ret, oldval, uaddr, oparg);
49*4882a593Smuzhiyun break;
50*4882a593Smuzhiyun case FUTEX_OP_XOR:
51*4882a593Smuzhiyun __futex_atomic_op("xor %0,%3,%1\n", ret, oldval, uaddr, oparg);
52*4882a593Smuzhiyun break;
53*4882a593Smuzhiyun default:
54*4882a593Smuzhiyun ret = -ENOSYS;
55*4882a593Smuzhiyun }
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun if (!ret)
58*4882a593Smuzhiyun *oval = oldval;
59*4882a593Smuzhiyun
60*4882a593Smuzhiyun return ret;
61*4882a593Smuzhiyun }
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun static inline int
futex_atomic_cmpxchg_inatomic(u32 * uval,u32 __user * uaddr,u32 oldval,u32 newval)64*4882a593Smuzhiyun futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
65*4882a593Smuzhiyun u32 oldval, u32 newval)
66*4882a593Smuzhiyun {
67*4882a593Smuzhiyun int ret = 0, cmp;
68*4882a593Smuzhiyun u32 prev;
69*4882a593Smuzhiyun
70*4882a593Smuzhiyun if (!access_ok(uaddr, sizeof(u32)))
71*4882a593Smuzhiyun return -EFAULT;
72*4882a593Smuzhiyun
73*4882a593Smuzhiyun __asm__ __volatile__ (
74*4882a593Smuzhiyun __ASM_SMP_MB
75*4882a593Smuzhiyun "1: ldl_l %1,0(%3)\n"
76*4882a593Smuzhiyun " cmpeq %1,%4,%2\n"
77*4882a593Smuzhiyun " beq %2,3f\n"
78*4882a593Smuzhiyun " mov %5,%2\n"
79*4882a593Smuzhiyun "2: stl_c %2,0(%3)\n"
80*4882a593Smuzhiyun " beq %2,4f\n"
81*4882a593Smuzhiyun "3: .subsection 2\n"
82*4882a593Smuzhiyun "4: br 1b\n"
83*4882a593Smuzhiyun " .previous\n"
84*4882a593Smuzhiyun EXC(1b,3b,$31,%0)
85*4882a593Smuzhiyun EXC(2b,3b,$31,%0)
86*4882a593Smuzhiyun : "+r"(ret), "=&r"(prev), "=&r"(cmp)
87*4882a593Smuzhiyun : "r"(uaddr), "r"((long)(int)oldval), "r"(newval)
88*4882a593Smuzhiyun : "memory");
89*4882a593Smuzhiyun
90*4882a593Smuzhiyun *uval = prev;
91*4882a593Smuzhiyun return ret;
92*4882a593Smuzhiyun }
93*4882a593Smuzhiyun
94*4882a593Smuzhiyun #endif /* __KERNEL__ */
95*4882a593Smuzhiyun #endif /* _ASM_ALPHA_FUTEX_H */
96