1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun /* 3*4882a593Smuzhiyun * include/asm-alpha/cache.h 4*4882a593Smuzhiyun */ 5*4882a593Smuzhiyun #ifndef __ARCH_ALPHA_CACHE_H 6*4882a593Smuzhiyun #define __ARCH_ALPHA_CACHE_H 7*4882a593Smuzhiyun 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun /* Bytes per L1 (data) cache line. */ 10*4882a593Smuzhiyun #if defined(CONFIG_ALPHA_GENERIC) || defined(CONFIG_ALPHA_EV6) 11*4882a593Smuzhiyun # define L1_CACHE_BYTES 64 12*4882a593Smuzhiyun # define L1_CACHE_SHIFT 6 13*4882a593Smuzhiyun #else 14*4882a593Smuzhiyun /* Both EV4 and EV5 are write-through, read-allocate, 15*4882a593Smuzhiyun direct-mapped, physical. 16*4882a593Smuzhiyun */ 17*4882a593Smuzhiyun # define L1_CACHE_BYTES 32 18*4882a593Smuzhiyun # define L1_CACHE_SHIFT 5 19*4882a593Smuzhiyun #endif 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun #define SMP_CACHE_BYTES L1_CACHE_BYTES 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun #endif 24