1*4882a593Smuzhiyun /* SPDX-License-Identifier: GPL-2.0 */ 2*4882a593Smuzhiyun #ifndef _ALPHA_AGP_BACKEND_H 3*4882a593Smuzhiyun #define _ALPHA_AGP_BACKEND_H 1 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun typedef union _alpha_agp_mode { 6*4882a593Smuzhiyun struct { 7*4882a593Smuzhiyun u32 rate : 3; 8*4882a593Smuzhiyun u32 reserved0 : 1; 9*4882a593Smuzhiyun u32 fw : 1; 10*4882a593Smuzhiyun u32 fourgb : 1; 11*4882a593Smuzhiyun u32 reserved1 : 2; 12*4882a593Smuzhiyun u32 enable : 1; 13*4882a593Smuzhiyun u32 sba : 1; 14*4882a593Smuzhiyun u32 reserved2 : 14; 15*4882a593Smuzhiyun u32 rq : 8; 16*4882a593Smuzhiyun } bits; 17*4882a593Smuzhiyun u32 lw; 18*4882a593Smuzhiyun } alpha_agp_mode; 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun typedef struct _alpha_agp_info { 21*4882a593Smuzhiyun struct pci_controller *hose; 22*4882a593Smuzhiyun struct { 23*4882a593Smuzhiyun dma_addr_t bus_base; 24*4882a593Smuzhiyun unsigned long size; 25*4882a593Smuzhiyun void *sysdata; 26*4882a593Smuzhiyun } aperture; 27*4882a593Smuzhiyun alpha_agp_mode capability; 28*4882a593Smuzhiyun alpha_agp_mode mode; 29*4882a593Smuzhiyun void *private; 30*4882a593Smuzhiyun struct alpha_agp_ops *ops; 31*4882a593Smuzhiyun } alpha_agp_info; 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun struct alpha_agp_ops { 34*4882a593Smuzhiyun int (*setup)(alpha_agp_info *); 35*4882a593Smuzhiyun void (*cleanup)(alpha_agp_info *); 36*4882a593Smuzhiyun int (*configure)(alpha_agp_info *); 37*4882a593Smuzhiyun int (*bind)(alpha_agp_info *, off_t, struct agp_memory *); 38*4882a593Smuzhiyun int (*unbind)(alpha_agp_info *, off_t, struct agp_memory *); 39*4882a593Smuzhiyun unsigned long (*translate)(alpha_agp_info *, dma_addr_t); 40*4882a593Smuzhiyun }; 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #endif /* _ALPHA_AGP_BACKEND_H */ 44