1*4882a593Smuzhiyun.. SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun=========================== 4*4882a593SmuzhiyunAMD64 Specific Boot Options 5*4882a593Smuzhiyun=========================== 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunThere are many others (usually documented in driver documentation), but 8*4882a593Smuzhiyunonly the AMD64 specific ones are listed here. 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunMachine check 11*4882a593Smuzhiyun============= 12*4882a593SmuzhiyunPlease see Documentation/x86/x86_64/machinecheck.rst for sysfs runtime tunables. 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun mce=off 15*4882a593Smuzhiyun Disable machine check 16*4882a593Smuzhiyun mce=no_cmci 17*4882a593Smuzhiyun Disable CMCI(Corrected Machine Check Interrupt) that 18*4882a593Smuzhiyun Intel processor supports. Usually this disablement is 19*4882a593Smuzhiyun not recommended, but it might be handy if your hardware 20*4882a593Smuzhiyun is misbehaving. 21*4882a593Smuzhiyun Note that you'll get more problems without CMCI than with 22*4882a593Smuzhiyun due to the shared banks, i.e. you might get duplicated 23*4882a593Smuzhiyun error logs. 24*4882a593Smuzhiyun mce=dont_log_ce 25*4882a593Smuzhiyun Don't make logs for corrected errors. All events reported 26*4882a593Smuzhiyun as corrected are silently cleared by OS. 27*4882a593Smuzhiyun This option will be useful if you have no interest in any 28*4882a593Smuzhiyun of corrected errors. 29*4882a593Smuzhiyun mce=ignore_ce 30*4882a593Smuzhiyun Disable features for corrected errors, e.g. polling timer 31*4882a593Smuzhiyun and CMCI. All events reported as corrected are not cleared 32*4882a593Smuzhiyun by OS and remained in its error banks. 33*4882a593Smuzhiyun Usually this disablement is not recommended, however if 34*4882a593Smuzhiyun there is an agent checking/clearing corrected errors 35*4882a593Smuzhiyun (e.g. BIOS or hardware monitoring applications), conflicting 36*4882a593Smuzhiyun with OS's error handling, and you cannot deactivate the agent, 37*4882a593Smuzhiyun then this option will be a help. 38*4882a593Smuzhiyun mce=no_lmce 39*4882a593Smuzhiyun Do not opt-in to Local MCE delivery. Use legacy method 40*4882a593Smuzhiyun to broadcast MCEs. 41*4882a593Smuzhiyun mce=bootlog 42*4882a593Smuzhiyun Enable logging of machine checks left over from booting. 43*4882a593Smuzhiyun Disabled by default on AMD Fam10h and older because some BIOS 44*4882a593Smuzhiyun leave bogus ones. 45*4882a593Smuzhiyun If your BIOS doesn't do that it's a good idea to enable though 46*4882a593Smuzhiyun to make sure you log even machine check events that result 47*4882a593Smuzhiyun in a reboot. On Intel systems it is enabled by default. 48*4882a593Smuzhiyun mce=nobootlog 49*4882a593Smuzhiyun Disable boot machine check logging. 50*4882a593Smuzhiyun mce=tolerancelevel[,monarchtimeout] (number,number) 51*4882a593Smuzhiyun tolerance levels: 52*4882a593Smuzhiyun 0: always panic on uncorrected errors, log corrected errors 53*4882a593Smuzhiyun 1: panic or SIGBUS on uncorrected errors, log corrected errors 54*4882a593Smuzhiyun 2: SIGBUS or log uncorrected errors, log corrected errors 55*4882a593Smuzhiyun 3: never panic or SIGBUS, log all errors (for testing only) 56*4882a593Smuzhiyun Default is 1 57*4882a593Smuzhiyun Can be also set using sysfs which is preferable. 58*4882a593Smuzhiyun monarchtimeout: 59*4882a593Smuzhiyun Sets the time in us to wait for other CPUs on machine checks. 0 60*4882a593Smuzhiyun to disable. 61*4882a593Smuzhiyun mce=bios_cmci_threshold 62*4882a593Smuzhiyun Don't overwrite the bios-set CMCI threshold. This boot option 63*4882a593Smuzhiyun prevents Linux from overwriting the CMCI threshold set by the 64*4882a593Smuzhiyun bios. Without this option, Linux always sets the CMCI 65*4882a593Smuzhiyun threshold to 1. Enabling this may make memory predictive failure 66*4882a593Smuzhiyun analysis less effective if the bios sets thresholds for memory 67*4882a593Smuzhiyun errors since we will not see details for all errors. 68*4882a593Smuzhiyun mce=recovery 69*4882a593Smuzhiyun Force-enable recoverable machine check code paths 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun nomce (for compatibility with i386) 72*4882a593Smuzhiyun same as mce=off 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun Everything else is in sysfs now. 75*4882a593Smuzhiyun 76*4882a593SmuzhiyunAPICs 77*4882a593Smuzhiyun===== 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun apic 80*4882a593Smuzhiyun Use IO-APIC. Default 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun noapic 83*4882a593Smuzhiyun Don't use the IO-APIC. 84*4882a593Smuzhiyun 85*4882a593Smuzhiyun disableapic 86*4882a593Smuzhiyun Don't use the local APIC 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun nolapic 89*4882a593Smuzhiyun Don't use the local APIC (alias for i386 compatibility) 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun pirq=... 92*4882a593Smuzhiyun See Documentation/x86/i386/IO-APIC.rst 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun noapictimer 95*4882a593Smuzhiyun Don't set up the APIC timer 96*4882a593Smuzhiyun 97*4882a593Smuzhiyun no_timer_check 98*4882a593Smuzhiyun Don't check the IO-APIC timer. This can work around 99*4882a593Smuzhiyun problems with incorrect timer initialization on some boards. 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun apicpmtimer 102*4882a593Smuzhiyun Do APIC timer calibration using the pmtimer. Implies 103*4882a593Smuzhiyun apicmaintimer. Useful when your PIT timer is totally broken. 104*4882a593Smuzhiyun 105*4882a593SmuzhiyunTiming 106*4882a593Smuzhiyun====== 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun notsc 109*4882a593Smuzhiyun Deprecated, use tsc=unstable instead. 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun nohpet 112*4882a593Smuzhiyun Don't use the HPET timer. 113*4882a593Smuzhiyun 114*4882a593SmuzhiyunIdle loop 115*4882a593Smuzhiyun========= 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun idle=poll 118*4882a593Smuzhiyun Don't do power saving in the idle loop using HLT, but poll for rescheduling 119*4882a593Smuzhiyun event. This will make the CPUs eat a lot more power, but may be useful 120*4882a593Smuzhiyun to get slightly better performance in multiprocessor benchmarks. It also 121*4882a593Smuzhiyun makes some profiling using performance counters more accurate. 122*4882a593Smuzhiyun Please note that on systems with MONITOR/MWAIT support (like Intel EM64T 123*4882a593Smuzhiyun CPUs) this option has no performance advantage over the normal idle loop. 124*4882a593Smuzhiyun It may also interact badly with hyperthreading. 125*4882a593Smuzhiyun 126*4882a593SmuzhiyunRebooting 127*4882a593Smuzhiyun========= 128*4882a593Smuzhiyun 129*4882a593Smuzhiyun reboot=b[ios] | t[riple] | k[bd] | a[cpi] | e[fi] [, [w]arm | [c]old] 130*4882a593Smuzhiyun bios 131*4882a593Smuzhiyun Use the CPU reboot vector for warm reset 132*4882a593Smuzhiyun warm 133*4882a593Smuzhiyun Don't set the cold reboot flag 134*4882a593Smuzhiyun cold 135*4882a593Smuzhiyun Set the cold reboot flag 136*4882a593Smuzhiyun triple 137*4882a593Smuzhiyun Force a triple fault (init) 138*4882a593Smuzhiyun kbd 139*4882a593Smuzhiyun Use the keyboard controller. cold reset (default) 140*4882a593Smuzhiyun acpi 141*4882a593Smuzhiyun Use the ACPI RESET_REG in the FADT. If ACPI is not configured or 142*4882a593Smuzhiyun the ACPI reset does not work, the reboot path attempts the reset 143*4882a593Smuzhiyun using the keyboard controller. 144*4882a593Smuzhiyun efi 145*4882a593Smuzhiyun Use efi reset_system runtime service. If EFI is not configured or 146*4882a593Smuzhiyun the EFI reset does not work, the reboot path attempts the reset using 147*4882a593Smuzhiyun the keyboard controller. 148*4882a593Smuzhiyun 149*4882a593Smuzhiyun Using warm reset will be much faster especially on big memory 150*4882a593Smuzhiyun systems because the BIOS will not go through the memory check. 151*4882a593Smuzhiyun Disadvantage is that not all hardware will be completely reinitialized 152*4882a593Smuzhiyun on reboot so there may be boot problems on some systems. 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun reboot=force 155*4882a593Smuzhiyun Don't stop other CPUs on reboot. This can make reboot more reliable 156*4882a593Smuzhiyun in some cases. 157*4882a593Smuzhiyun 158*4882a593SmuzhiyunNon Executable Mappings 159*4882a593Smuzhiyun======================= 160*4882a593Smuzhiyun 161*4882a593Smuzhiyun noexec=on|off 162*4882a593Smuzhiyun on 163*4882a593Smuzhiyun Enable(default) 164*4882a593Smuzhiyun off 165*4882a593Smuzhiyun Disable 166*4882a593Smuzhiyun 167*4882a593SmuzhiyunNUMA 168*4882a593Smuzhiyun==== 169*4882a593Smuzhiyun 170*4882a593Smuzhiyun numa=off 171*4882a593Smuzhiyun Only set up a single NUMA node spanning all memory. 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun numa=noacpi 174*4882a593Smuzhiyun Don't parse the SRAT table for NUMA setup 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun numa=nohmat 177*4882a593Smuzhiyun Don't parse the HMAT table for NUMA setup, or soft-reserved memory 178*4882a593Smuzhiyun partitioning. 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun numa=fake=<size>[MG] 181*4882a593Smuzhiyun If given as a memory unit, fills all system RAM with nodes of 182*4882a593Smuzhiyun size interleaved over physical nodes. 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun numa=fake=<N> 185*4882a593Smuzhiyun If given as an integer, fills all system RAM with N fake nodes 186*4882a593Smuzhiyun interleaved over physical nodes. 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun numa=fake=<N>U 189*4882a593Smuzhiyun If given as an integer followed by 'U', it will divide each 190*4882a593Smuzhiyun physical node into N emulated nodes. 191*4882a593Smuzhiyun 192*4882a593SmuzhiyunACPI 193*4882a593Smuzhiyun==== 194*4882a593Smuzhiyun 195*4882a593Smuzhiyun acpi=off 196*4882a593Smuzhiyun Don't enable ACPI 197*4882a593Smuzhiyun acpi=ht 198*4882a593Smuzhiyun Use ACPI boot table parsing, but don't enable ACPI interpreter 199*4882a593Smuzhiyun acpi=force 200*4882a593Smuzhiyun Force ACPI on (currently not needed) 201*4882a593Smuzhiyun acpi=strict 202*4882a593Smuzhiyun Disable out of spec ACPI workarounds. 203*4882a593Smuzhiyun acpi_sci={edge,level,high,low} 204*4882a593Smuzhiyun Set up ACPI SCI interrupt. 205*4882a593Smuzhiyun acpi=noirq 206*4882a593Smuzhiyun Don't route interrupts 207*4882a593Smuzhiyun acpi=nocmcff 208*4882a593Smuzhiyun Disable firmware first mode for corrected errors. This 209*4882a593Smuzhiyun disables parsing the HEST CMC error source to check if 210*4882a593Smuzhiyun firmware has set the FF flag. This may result in 211*4882a593Smuzhiyun duplicate corrected error reports. 212*4882a593Smuzhiyun 213*4882a593SmuzhiyunPCI 214*4882a593Smuzhiyun=== 215*4882a593Smuzhiyun 216*4882a593Smuzhiyun pci=off 217*4882a593Smuzhiyun Don't use PCI 218*4882a593Smuzhiyun pci=conf1 219*4882a593Smuzhiyun Use conf1 access. 220*4882a593Smuzhiyun pci=conf2 221*4882a593Smuzhiyun Use conf2 access. 222*4882a593Smuzhiyun pci=rom 223*4882a593Smuzhiyun Assign ROMs. 224*4882a593Smuzhiyun pci=assign-busses 225*4882a593Smuzhiyun Assign busses 226*4882a593Smuzhiyun pci=irqmask=MASK 227*4882a593Smuzhiyun Set PCI interrupt mask to MASK 228*4882a593Smuzhiyun pci=lastbus=NUMBER 229*4882a593Smuzhiyun Scan up to NUMBER busses, no matter what the mptable says. 230*4882a593Smuzhiyun pci=noacpi 231*4882a593Smuzhiyun Don't use ACPI to set up PCI interrupt routing. 232*4882a593Smuzhiyun 233*4882a593SmuzhiyunIOMMU (input/output memory management unit) 234*4882a593Smuzhiyun=========================================== 235*4882a593SmuzhiyunMultiple x86-64 PCI-DMA mapping implementations exist, for example: 236*4882a593Smuzhiyun 237*4882a593Smuzhiyun 1. <kernel/dma/direct.c>: use no hardware/software IOMMU at all 238*4882a593Smuzhiyun (e.g. because you have < 3 GB memory). 239*4882a593Smuzhiyun Kernel boot message: "PCI-DMA: Disabling IOMMU" 240*4882a593Smuzhiyun 241*4882a593Smuzhiyun 2. <arch/x86/kernel/amd_gart_64.c>: AMD GART based hardware IOMMU. 242*4882a593Smuzhiyun Kernel boot message: "PCI-DMA: using GART IOMMU" 243*4882a593Smuzhiyun 244*4882a593Smuzhiyun 3. <arch/x86_64/kernel/pci-swiotlb.c> : Software IOMMU implementation. Used 245*4882a593Smuzhiyun e.g. if there is no hardware IOMMU in the system and it is need because 246*4882a593Smuzhiyun you have >3GB memory or told the kernel to us it (iommu=soft)) 247*4882a593Smuzhiyun Kernel boot message: "PCI-DMA: Using software bounce buffering 248*4882a593Smuzhiyun for IO (SWIOTLB)" 249*4882a593Smuzhiyun 250*4882a593Smuzhiyun 4. <arch/x86_64/pci-calgary.c> : IBM Calgary hardware IOMMU. Used in IBM 251*4882a593Smuzhiyun pSeries and xSeries servers. This hardware IOMMU supports DMA address 252*4882a593Smuzhiyun mapping with memory protection, etc. 253*4882a593Smuzhiyun Kernel boot message: "PCI-DMA: Using Calgary IOMMU" 254*4882a593Smuzhiyun 255*4882a593Smuzhiyun:: 256*4882a593Smuzhiyun 257*4882a593Smuzhiyun iommu=[<size>][,noagp][,off][,force][,noforce] 258*4882a593Smuzhiyun [,memaper[=<order>]][,merge][,fullflush][,nomerge] 259*4882a593Smuzhiyun [,noaperture][,calgary] 260*4882a593Smuzhiyun 261*4882a593SmuzhiyunGeneral iommu options: 262*4882a593Smuzhiyun 263*4882a593Smuzhiyun off 264*4882a593Smuzhiyun Don't initialize and use any kind of IOMMU. 265*4882a593Smuzhiyun noforce 266*4882a593Smuzhiyun Don't force hardware IOMMU usage when it is not needed. (default). 267*4882a593Smuzhiyun force 268*4882a593Smuzhiyun Force the use of the hardware IOMMU even when it is 269*4882a593Smuzhiyun not actually needed (e.g. because < 3 GB memory). 270*4882a593Smuzhiyun soft 271*4882a593Smuzhiyun Use software bounce buffering (SWIOTLB) (default for 272*4882a593Smuzhiyun Intel machines). This can be used to prevent the usage 273*4882a593Smuzhiyun of an available hardware IOMMU. 274*4882a593Smuzhiyun 275*4882a593Smuzhiyuniommu options only relevant to the AMD GART hardware IOMMU: 276*4882a593Smuzhiyun 277*4882a593Smuzhiyun <size> 278*4882a593Smuzhiyun Set the size of the remapping area in bytes. 279*4882a593Smuzhiyun allowed 280*4882a593Smuzhiyun Overwrite iommu off workarounds for specific chipsets. 281*4882a593Smuzhiyun fullflush 282*4882a593Smuzhiyun Flush IOMMU on each allocation (default). 283*4882a593Smuzhiyun nofullflush 284*4882a593Smuzhiyun Don't use IOMMU fullflush. 285*4882a593Smuzhiyun memaper[=<order>] 286*4882a593Smuzhiyun Allocate an own aperture over RAM with size 32MB<<order. 287*4882a593Smuzhiyun (default: order=1, i.e. 64MB) 288*4882a593Smuzhiyun merge 289*4882a593Smuzhiyun Do scatter-gather (SG) merging. Implies "force" (experimental). 290*4882a593Smuzhiyun nomerge 291*4882a593Smuzhiyun Don't do scatter-gather (SG) merging. 292*4882a593Smuzhiyun noaperture 293*4882a593Smuzhiyun Ask the IOMMU not to touch the aperture for AGP. 294*4882a593Smuzhiyun noagp 295*4882a593Smuzhiyun Don't initialize the AGP driver and use full aperture. 296*4882a593Smuzhiyun panic 297*4882a593Smuzhiyun Always panic when IOMMU overflows. 298*4882a593Smuzhiyun calgary 299*4882a593Smuzhiyun Use the Calgary IOMMU if it is available 300*4882a593Smuzhiyun 301*4882a593Smuzhiyuniommu options only relevant to the software bounce buffering (SWIOTLB) IOMMU 302*4882a593Smuzhiyunimplementation: 303*4882a593Smuzhiyun 304*4882a593Smuzhiyun swiotlb=<pages>[,force] 305*4882a593Smuzhiyun <pages> 306*4882a593Smuzhiyun Prereserve that many 128K pages for the software IO bounce buffering. 307*4882a593Smuzhiyun force 308*4882a593Smuzhiyun Force all IO through the software TLB. 309*4882a593Smuzhiyun 310*4882a593SmuzhiyunSettings for the IBM Calgary hardware IOMMU currently found in IBM 311*4882a593SmuzhiyunpSeries and xSeries machines 312*4882a593Smuzhiyun 313*4882a593Smuzhiyun calgary=[64k,128k,256k,512k,1M,2M,4M,8M] 314*4882a593Smuzhiyun Set the size of each PCI slot's translation table when using the 315*4882a593Smuzhiyun Calgary IOMMU. This is the size of the translation table itself 316*4882a593Smuzhiyun in main memory. The smallest table, 64k, covers an IO space of 317*4882a593Smuzhiyun 32MB; the largest, 8MB table, can cover an IO space of 4GB. 318*4882a593Smuzhiyun Normally the kernel will make the right choice by itself. 319*4882a593Smuzhiyun calgary=[translate_empty_slots] 320*4882a593Smuzhiyun Enable translation even on slots that have no devices attached to 321*4882a593Smuzhiyun them, in case a device will be hotplugged in the future. 322*4882a593Smuzhiyun calgary=[disable=<PCI bus number>] 323*4882a593Smuzhiyun Disable translation on a given PHB. For 324*4882a593Smuzhiyun example, the built-in graphics adapter resides on the first bridge 325*4882a593Smuzhiyun (PCI bus number 0); if translation (isolation) is enabled on this 326*4882a593Smuzhiyun bridge, X servers that access the hardware directly from user 327*4882a593Smuzhiyun space might stop working. Use this option if you have devices that 328*4882a593Smuzhiyun are accessed from userspace directly on some PCI host bridge. 329*4882a593Smuzhiyun panic 330*4882a593Smuzhiyun Always panic when IOMMU overflows 331*4882a593Smuzhiyun 332*4882a593Smuzhiyun 333*4882a593SmuzhiyunMiscellaneous 334*4882a593Smuzhiyun============= 335*4882a593Smuzhiyun 336*4882a593Smuzhiyun nogbpages 337*4882a593Smuzhiyun Do not use GB pages for kernel direct mappings. 338*4882a593Smuzhiyun gbpages 339*4882a593Smuzhiyun Use GB pages for kernel direct mappings. 340