1*4882a593Smuzhiyun.. SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun====================== 4*4882a593SmuzhiyunGeneric vcpu interface 5*4882a593Smuzhiyun====================== 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunThe virtual cpu "device" also accepts the ioctls KVM_SET_DEVICE_ATTR, 8*4882a593SmuzhiyunKVM_GET_DEVICE_ATTR, and KVM_HAS_DEVICE_ATTR. The interface uses the same struct 9*4882a593Smuzhiyunkvm_device_attr as other devices, but targets VCPU-wide settings and controls. 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunThe groups and attributes per virtual cpu, if any, are architecture specific. 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun1. GROUP: KVM_ARM_VCPU_PMU_V3_CTRL 14*4882a593Smuzhiyun================================== 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun:Architectures: ARM64 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun1.1. ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_IRQ 19*4882a593Smuzhiyun--------------------------------------- 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun:Parameters: in kvm_device_attr.addr the address for PMU overflow interrupt is a 22*4882a593Smuzhiyun pointer to an int 23*4882a593Smuzhiyun 24*4882a593SmuzhiyunReturns: 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun ======= ======================================================== 27*4882a593Smuzhiyun -EBUSY The PMU overflow interrupt is already set 28*4882a593Smuzhiyun -EFAULT Error reading interrupt number 29*4882a593Smuzhiyun -ENXIO PMUv3 not supported or the overflow interrupt not set 30*4882a593Smuzhiyun when attempting to get it 31*4882a593Smuzhiyun -ENODEV KVM_ARM_VCPU_PMU_V3 feature missing from VCPU 32*4882a593Smuzhiyun -EINVAL Invalid PMU overflow interrupt number supplied or 33*4882a593Smuzhiyun trying to set the IRQ number without using an in-kernel 34*4882a593Smuzhiyun irqchip. 35*4882a593Smuzhiyun ======= ======================================================== 36*4882a593Smuzhiyun 37*4882a593SmuzhiyunA value describing the PMUv3 (Performance Monitor Unit v3) overflow interrupt 38*4882a593Smuzhiyunnumber for this vcpu. This interrupt could be a PPI or SPI, but the interrupt 39*4882a593Smuzhiyuntype must be same for each vcpu. As a PPI, the interrupt number is the same for 40*4882a593Smuzhiyunall vcpus, while as an SPI it must be a separate number per vcpu. 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun1.2 ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_INIT 43*4882a593Smuzhiyun--------------------------------------- 44*4882a593Smuzhiyun 45*4882a593Smuzhiyun:Parameters: no additional parameter in kvm_device_attr.addr 46*4882a593Smuzhiyun 47*4882a593SmuzhiyunReturns: 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun ======= ====================================================== 50*4882a593Smuzhiyun -EEXIST Interrupt number already used 51*4882a593Smuzhiyun -ENODEV PMUv3 not supported or GIC not initialized 52*4882a593Smuzhiyun -ENXIO PMUv3 not supported, missing VCPU feature or interrupt 53*4882a593Smuzhiyun number not set 54*4882a593Smuzhiyun -EBUSY PMUv3 already initialized 55*4882a593Smuzhiyun ======= ====================================================== 56*4882a593Smuzhiyun 57*4882a593SmuzhiyunRequest the initialization of the PMUv3. If using the PMUv3 with an in-kernel 58*4882a593Smuzhiyunvirtual GIC implementation, this must be done after initializing the in-kernel 59*4882a593Smuzhiyunirqchip. 60*4882a593Smuzhiyun 61*4882a593Smuzhiyun1.3 ATTRIBUTE: KVM_ARM_VCPU_PMU_V3_FILTER 62*4882a593Smuzhiyun----------------------------------------- 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun:Parameters: in kvm_device_attr.addr the address for a PMU event filter is a 65*4882a593Smuzhiyun pointer to a struct kvm_pmu_event_filter 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun:Returns: 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun ======= ====================================================== 70*4882a593Smuzhiyun -ENODEV PMUv3 not supported or GIC not initialized 71*4882a593Smuzhiyun -ENXIO PMUv3 not properly configured or in-kernel irqchip not 72*4882a593Smuzhiyun configured as required prior to calling this attribute 73*4882a593Smuzhiyun -EBUSY PMUv3 already initialized 74*4882a593Smuzhiyun -EINVAL Invalid filter range 75*4882a593Smuzhiyun ======= ====================================================== 76*4882a593Smuzhiyun 77*4882a593SmuzhiyunRequest the installation of a PMU event filter described as follows:: 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun struct kvm_pmu_event_filter { 80*4882a593Smuzhiyun __u16 base_event; 81*4882a593Smuzhiyun __u16 nevents; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun #define KVM_PMU_EVENT_ALLOW 0 84*4882a593Smuzhiyun #define KVM_PMU_EVENT_DENY 1 85*4882a593Smuzhiyun 86*4882a593Smuzhiyun __u8 action; 87*4882a593Smuzhiyun __u8 pad[3]; 88*4882a593Smuzhiyun }; 89*4882a593Smuzhiyun 90*4882a593SmuzhiyunA filter range is defined as the range [@base_event, @base_event + @nevents), 91*4882a593Smuzhiyuntogether with an @action (KVM_PMU_EVENT_ALLOW or KVM_PMU_EVENT_DENY). The 92*4882a593Smuzhiyunfirst registered range defines the global policy (global ALLOW if the first 93*4882a593Smuzhiyun@action is DENY, global DENY if the first @action is ALLOW). Multiple ranges 94*4882a593Smuzhiyuncan be programmed, and must fit within the event space defined by the PMU 95*4882a593Smuzhiyunarchitecture (10 bits on ARMv8.0, 16 bits from ARMv8.1 onwards). 96*4882a593Smuzhiyun 97*4882a593SmuzhiyunNote: "Cancelling" a filter by registering the opposite action for the same 98*4882a593Smuzhiyunrange doesn't change the default action. For example, installing an ALLOW 99*4882a593Smuzhiyunfilter for event range [0:10) as the first filter and then applying a DENY 100*4882a593Smuzhiyunaction for the same range will leave the whole range as disabled. 101*4882a593Smuzhiyun 102*4882a593SmuzhiyunRestrictions: Event 0 (SW_INCR) is never filtered, as it doesn't count a 103*4882a593Smuzhiyunhardware event. Filtering event 0x1E (CHAIN) has no effect either, as it 104*4882a593Smuzhiyunisn't strictly speaking an event. Filtering the cycle counter is possible 105*4882a593Smuzhiyunusing event 0x11 (CPU_CYCLES). 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun2. GROUP: KVM_ARM_VCPU_TIMER_CTRL 109*4882a593Smuzhiyun================================= 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun:Architectures: ARM, ARM64 112*4882a593Smuzhiyun 113*4882a593Smuzhiyun2.1. ATTRIBUTES: KVM_ARM_VCPU_TIMER_IRQ_VTIMER, KVM_ARM_VCPU_TIMER_IRQ_PTIMER 114*4882a593Smuzhiyun----------------------------------------------------------------------------- 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun:Parameters: in kvm_device_attr.addr the address for the timer interrupt is a 117*4882a593Smuzhiyun pointer to an int 118*4882a593Smuzhiyun 119*4882a593SmuzhiyunReturns: 120*4882a593Smuzhiyun 121*4882a593Smuzhiyun ======= ================================= 122*4882a593Smuzhiyun -EINVAL Invalid timer interrupt number 123*4882a593Smuzhiyun -EBUSY One or more VCPUs has already run 124*4882a593Smuzhiyun ======= ================================= 125*4882a593Smuzhiyun 126*4882a593SmuzhiyunA value describing the architected timer interrupt number when connected to an 127*4882a593Smuzhiyunin-kernel virtual GIC. These must be a PPI (16 <= intid < 32). Setting the 128*4882a593Smuzhiyunattribute overrides the default values (see below). 129*4882a593Smuzhiyun 130*4882a593Smuzhiyun============================= ========================================== 131*4882a593SmuzhiyunKVM_ARM_VCPU_TIMER_IRQ_VTIMER The EL1 virtual timer intid (default: 27) 132*4882a593SmuzhiyunKVM_ARM_VCPU_TIMER_IRQ_PTIMER The EL1 physical timer intid (default: 30) 133*4882a593Smuzhiyun============================= ========================================== 134*4882a593Smuzhiyun 135*4882a593SmuzhiyunSetting the same PPI for different timers will prevent the VCPUs from running. 136*4882a593SmuzhiyunSetting the interrupt number on a VCPU configures all VCPUs created at that 137*4882a593Smuzhiyuntime to use the number provided for a given timer, overwriting any previously 138*4882a593Smuzhiyunconfigured values on other VCPUs. Userspace should configure the interrupt 139*4882a593Smuzhiyunnumbers on at least one VCPU after creating all VCPUs and before running any 140*4882a593SmuzhiyunVCPUs. 141*4882a593Smuzhiyun 142*4882a593Smuzhiyun3. GROUP: KVM_ARM_VCPU_PVTIME_CTRL 143*4882a593Smuzhiyun================================== 144*4882a593Smuzhiyun 145*4882a593Smuzhiyun:Architectures: ARM64 146*4882a593Smuzhiyun 147*4882a593Smuzhiyun3.1 ATTRIBUTE: KVM_ARM_VCPU_PVTIME_IPA 148*4882a593Smuzhiyun-------------------------------------- 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun:Parameters: 64-bit base address 151*4882a593Smuzhiyun 152*4882a593SmuzhiyunReturns: 153*4882a593Smuzhiyun 154*4882a593Smuzhiyun ======= ====================================== 155*4882a593Smuzhiyun -ENXIO Stolen time not implemented 156*4882a593Smuzhiyun -EEXIST Base address already set for this VCPU 157*4882a593Smuzhiyun -EINVAL Base address not 64 byte aligned 158*4882a593Smuzhiyun ======= ====================================== 159*4882a593Smuzhiyun 160*4882a593SmuzhiyunSpecifies the base address of the stolen time structure for this VCPU. The 161*4882a593Smuzhiyunbase address must be 64 byte aligned and exist within a valid guest memory 162*4882a593Smuzhiyunregion. See Documentation/virt/kvm/arm/pvtime.rst for more information 163*4882a593Smuzhiyunincluding the layout of the stolen time structure. 164