1*4882a593Smuzhiyun.. SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun=============================================== 4*4882a593SmuzhiyunARM Virtual Interrupt Translation Service (ITS) 5*4882a593Smuzhiyun=============================================== 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunDevice types supported: 8*4882a593Smuzhiyun KVM_DEV_TYPE_ARM_VGIC_ITS ARM Interrupt Translation Service Controller 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunThe ITS allows MSI(-X) interrupts to be injected into guests. This extension is 11*4882a593Smuzhiyunoptional. Creating a virtual ITS controller also requires a host GICv3 (see 12*4882a593Smuzhiyunarm-vgic-v3.txt), but does not depend on having physical ITS controllers. 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunThere can be multiple ITS controllers per guest, each of them has to have 15*4882a593Smuzhiyuna separate, non-overlapping MMIO region. 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunGroups 19*4882a593Smuzhiyun====== 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunKVM_DEV_ARM_VGIC_GRP_ADDR 22*4882a593Smuzhiyun------------------------- 23*4882a593Smuzhiyun 24*4882a593Smuzhiyun Attributes: 25*4882a593Smuzhiyun KVM_VGIC_ITS_ADDR_TYPE (rw, 64-bit) 26*4882a593Smuzhiyun Base address in the guest physical address space of the GICv3 ITS 27*4882a593Smuzhiyun control register frame. 28*4882a593Smuzhiyun This address needs to be 64K aligned and the region covers 128K. 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun Errors: 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun ======= ================================================= 33*4882a593Smuzhiyun -E2BIG Address outside of addressable IPA range 34*4882a593Smuzhiyun -EINVAL Incorrectly aligned address 35*4882a593Smuzhiyun -EEXIST Address already configured 36*4882a593Smuzhiyun -EFAULT Invalid user pointer for attr->addr. 37*4882a593Smuzhiyun -ENODEV Incorrect attribute or the ITS is not supported. 38*4882a593Smuzhiyun ======= ================================================= 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunKVM_DEV_ARM_VGIC_GRP_CTRL 42*4882a593Smuzhiyun------------------------- 43*4882a593Smuzhiyun 44*4882a593Smuzhiyun Attributes: 45*4882a593Smuzhiyun KVM_DEV_ARM_VGIC_CTRL_INIT 46*4882a593Smuzhiyun request the initialization of the ITS, no additional parameter in 47*4882a593Smuzhiyun kvm_device_attr.addr. 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun KVM_DEV_ARM_ITS_CTRL_RESET 50*4882a593Smuzhiyun reset the ITS, no additional parameter in kvm_device_attr.addr. 51*4882a593Smuzhiyun See "ITS Reset State" section. 52*4882a593Smuzhiyun 53*4882a593Smuzhiyun KVM_DEV_ARM_ITS_SAVE_TABLES 54*4882a593Smuzhiyun save the ITS table data into guest RAM, at the location provisioned 55*4882a593Smuzhiyun by the guest in corresponding registers/table entries. 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun The layout of the tables in guest memory defines an ABI. The entries 58*4882a593Smuzhiyun are laid out in little endian format as described in the last paragraph. 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun KVM_DEV_ARM_ITS_RESTORE_TABLES 61*4882a593Smuzhiyun restore the ITS tables from guest RAM to ITS internal structures. 62*4882a593Smuzhiyun 63*4882a593Smuzhiyun The GICV3 must be restored before the ITS and all ITS registers but 64*4882a593Smuzhiyun the GITS_CTLR must be restored before restoring the ITS tables. 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun The GITS_IIDR read-only register must also be restored before 67*4882a593Smuzhiyun calling KVM_DEV_ARM_ITS_RESTORE_TABLES as the IIDR revision field 68*4882a593Smuzhiyun encodes the ABI revision. 69*4882a593Smuzhiyun 70*4882a593Smuzhiyun The expected ordering when restoring the GICv3/ITS is described in section 71*4882a593Smuzhiyun "ITS Restore Sequence". 72*4882a593Smuzhiyun 73*4882a593Smuzhiyun Errors: 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun ======= ========================================================== 76*4882a593Smuzhiyun -ENXIO ITS not properly configured as required prior to setting 77*4882a593Smuzhiyun this attribute 78*4882a593Smuzhiyun -ENOMEM Memory shortage when allocating ITS internal data 79*4882a593Smuzhiyun -EINVAL Inconsistent restored data 80*4882a593Smuzhiyun -EFAULT Invalid guest ram access 81*4882a593Smuzhiyun -EBUSY One or more VCPUS are running 82*4882a593Smuzhiyun -EACCES The virtual ITS is backed by a physical GICv4 ITS, and the 83*4882a593Smuzhiyun state is not available 84*4882a593Smuzhiyun ======= ========================================================== 85*4882a593Smuzhiyun 86*4882a593SmuzhiyunKVM_DEV_ARM_VGIC_GRP_ITS_REGS 87*4882a593Smuzhiyun----------------------------- 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun Attributes: 90*4882a593Smuzhiyun The attr field of kvm_device_attr encodes the offset of the 91*4882a593Smuzhiyun ITS register, relative to the ITS control frame base address 92*4882a593Smuzhiyun (ITS_base). 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun kvm_device_attr.addr points to a __u64 value whatever the width 95*4882a593Smuzhiyun of the addressed register (32/64 bits). 64 bit registers can only 96*4882a593Smuzhiyun be accessed with full length. 97*4882a593Smuzhiyun 98*4882a593Smuzhiyun Writes to read-only registers are ignored by the kernel except for: 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun - GITS_CREADR. It must be restored otherwise commands in the queue 101*4882a593Smuzhiyun will be re-executed after restoring CWRITER. GITS_CREADR must be 102*4882a593Smuzhiyun restored before restoring the GITS_CTLR which is likely to enable the 103*4882a593Smuzhiyun ITS. Also it must be restored after GITS_CBASER since a write to 104*4882a593Smuzhiyun GITS_CBASER resets GITS_CREADR. 105*4882a593Smuzhiyun - GITS_IIDR. The Revision field encodes the table layout ABI revision. 106*4882a593Smuzhiyun In the future we might implement direct injection of virtual LPIs. 107*4882a593Smuzhiyun This will require an upgrade of the table layout and an evolution of 108*4882a593Smuzhiyun the ABI. GITS_IIDR must be restored before calling 109*4882a593Smuzhiyun KVM_DEV_ARM_ITS_RESTORE_TABLES. 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun For other registers, getting or setting a register has the same 112*4882a593Smuzhiyun effect as reading/writing the register on real hardware. 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun Errors: 115*4882a593Smuzhiyun 116*4882a593Smuzhiyun ======= ==================================================== 117*4882a593Smuzhiyun -ENXIO Offset does not correspond to any supported register 118*4882a593Smuzhiyun -EFAULT Invalid user pointer for attr->addr 119*4882a593Smuzhiyun -EINVAL Offset is not 64-bit aligned 120*4882a593Smuzhiyun -EBUSY one or more VCPUS are running 121*4882a593Smuzhiyun ======= ==================================================== 122*4882a593Smuzhiyun 123*4882a593SmuzhiyunITS Restore Sequence: 124*4882a593Smuzhiyun--------------------- 125*4882a593Smuzhiyun 126*4882a593SmuzhiyunThe following ordering must be followed when restoring the GIC and the ITS: 127*4882a593Smuzhiyun 128*4882a593Smuzhiyuna) restore all guest memory and create vcpus 129*4882a593Smuzhiyunb) restore all redistributors 130*4882a593Smuzhiyunc) provide the ITS base address 131*4882a593Smuzhiyun (KVM_DEV_ARM_VGIC_GRP_ADDR) 132*4882a593Smuzhiyund) restore the ITS in the following order: 133*4882a593Smuzhiyun 134*4882a593Smuzhiyun 1. Restore GITS_CBASER 135*4882a593Smuzhiyun 2. Restore all other ``GITS_`` registers, except GITS_CTLR! 136*4882a593Smuzhiyun 3. Load the ITS table data (KVM_DEV_ARM_ITS_RESTORE_TABLES) 137*4882a593Smuzhiyun 4. Restore GITS_CTLR 138*4882a593Smuzhiyun 139*4882a593SmuzhiyunThen vcpus can be started. 140*4882a593Smuzhiyun 141*4882a593SmuzhiyunITS Table ABI REV0: 142*4882a593Smuzhiyun------------------- 143*4882a593Smuzhiyun 144*4882a593Smuzhiyun Revision 0 of the ABI only supports the features of a virtual GICv3, and does 145*4882a593Smuzhiyun not support a virtual GICv4 with support for direct injection of virtual 146*4882a593Smuzhiyun interrupts for nested hypervisors. 147*4882a593Smuzhiyun 148*4882a593Smuzhiyun The device table and ITT are indexed by the DeviceID and EventID, 149*4882a593Smuzhiyun respectively. The collection table is not indexed by CollectionID, and the 150*4882a593Smuzhiyun entries in the collection are listed in no particular order. 151*4882a593Smuzhiyun All entries are 8 bytes. 152*4882a593Smuzhiyun 153*4882a593Smuzhiyun Device Table Entry (DTE):: 154*4882a593Smuzhiyun 155*4882a593Smuzhiyun bits: | 63| 62 ... 49 | 48 ... 5 | 4 ... 0 | 156*4882a593Smuzhiyun values: | V | next | ITT_addr | Size | 157*4882a593Smuzhiyun 158*4882a593Smuzhiyun where: 159*4882a593Smuzhiyun 160*4882a593Smuzhiyun - V indicates whether the entry is valid. If not, other fields 161*4882a593Smuzhiyun are not meaningful. 162*4882a593Smuzhiyun - next: equals to 0 if this entry is the last one; otherwise it 163*4882a593Smuzhiyun corresponds to the DeviceID offset to the next DTE, capped by 164*4882a593Smuzhiyun 2^14 -1. 165*4882a593Smuzhiyun - ITT_addr matches bits [51:8] of the ITT address (256 Byte aligned). 166*4882a593Smuzhiyun - Size specifies the supported number of bits for the EventID, 167*4882a593Smuzhiyun minus one 168*4882a593Smuzhiyun 169*4882a593Smuzhiyun Collection Table Entry (CTE):: 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun bits: | 63| 62 .. 52 | 51 ... 16 | 15 ... 0 | 172*4882a593Smuzhiyun values: | V | RES0 | RDBase | ICID | 173*4882a593Smuzhiyun 174*4882a593Smuzhiyun where: 175*4882a593Smuzhiyun 176*4882a593Smuzhiyun - V indicates whether the entry is valid. If not, other fields are 177*4882a593Smuzhiyun not meaningful. 178*4882a593Smuzhiyun - RES0: reserved field with Should-Be-Zero-or-Preserved behavior. 179*4882a593Smuzhiyun - RDBase is the PE number (GICR_TYPER.Processor_Number semantic), 180*4882a593Smuzhiyun - ICID is the collection ID 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun Interrupt Translation Entry (ITE):: 183*4882a593Smuzhiyun 184*4882a593Smuzhiyun bits: | 63 ... 48 | 47 ... 16 | 15 ... 0 | 185*4882a593Smuzhiyun values: | next | pINTID | ICID | 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun where: 188*4882a593Smuzhiyun 189*4882a593Smuzhiyun - next: equals to 0 if this entry is the last one; otherwise it corresponds 190*4882a593Smuzhiyun to the EventID offset to the next ITE capped by 2^16 -1. 191*4882a593Smuzhiyun - pINTID is the physical LPI ID; if zero, it means the entry is not valid 192*4882a593Smuzhiyun and other fields are not meaningful. 193*4882a593Smuzhiyun - ICID is the collection ID 194*4882a593Smuzhiyun 195*4882a593SmuzhiyunITS Reset State: 196*4882a593Smuzhiyun---------------- 197*4882a593Smuzhiyun 198*4882a593SmuzhiyunRESET returns the ITS to the same state that it was when first created and 199*4882a593Smuzhiyuninitialized. When the RESET command returns, the following things are 200*4882a593Smuzhiyunguaranteed: 201*4882a593Smuzhiyun 202*4882a593Smuzhiyun- The ITS is not enabled and quiescent 203*4882a593Smuzhiyun GITS_CTLR.Enabled = 0 .Quiescent=1 204*4882a593Smuzhiyun- There is no internally cached state 205*4882a593Smuzhiyun- No collection or device table are used 206*4882a593Smuzhiyun GITS_BASER<n>.Valid = 0 207*4882a593Smuzhiyun- GITS_CBASER = 0, GITS_CREADR = 0, GITS_CWRITER = 0 208*4882a593Smuzhiyun- The ABI version is unchanged and remains the one set when the ITS 209*4882a593Smuzhiyun device was first created. 210