1*4882a593Smuzhiyun.. SPDX-License-Identifier: GFDL-1.1-no-invariants-or-later 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun.. _dv-controls: 4*4882a593Smuzhiyun 5*4882a593Smuzhiyun******************************* 6*4882a593SmuzhiyunDigital Video Control Reference 7*4882a593Smuzhiyun******************************* 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunThe Digital Video control class is intended to control receivers and 10*4882a593Smuzhiyuntransmitters for `VGA <http://en.wikipedia.org/wiki/Vga>`__, 11*4882a593Smuzhiyun`DVI <http://en.wikipedia.org/wiki/Digital_Visual_Interface>`__ 12*4882a593Smuzhiyun(Digital Visual Interface), HDMI (:ref:`hdmi`) and DisplayPort 13*4882a593Smuzhiyun(:ref:`dp`). These controls are generally expected to be private to 14*4882a593Smuzhiyunthe receiver or transmitter subdevice that implements them, so they are 15*4882a593Smuzhiyunonly exposed on the ``/dev/v4l-subdev*`` device node. 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun.. note:: 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun Note that these devices can have multiple input or output pads which are 20*4882a593Smuzhiyun hooked up to e.g. HDMI connectors. Even though the subdevice will 21*4882a593Smuzhiyun receive or transmit video from/to only one of those pads, the other pads 22*4882a593Smuzhiyun can still be active when it comes to EDID (Extended Display 23*4882a593Smuzhiyun Identification Data, :ref:`vesaedid`) and HDCP (High-bandwidth Digital 24*4882a593Smuzhiyun Content Protection System, :ref:`hdcp`) processing, allowing the 25*4882a593Smuzhiyun device to do the fairly slow EDID/HDCP handling in advance. This allows 26*4882a593Smuzhiyun for quick switching between connectors. 27*4882a593Smuzhiyun 28*4882a593SmuzhiyunThese pads appear in several of the controls in this section as 29*4882a593Smuzhiyunbitmasks, one bit for each pad. Bit 0 corresponds to pad 0, bit 1 to pad 30*4882a593Smuzhiyun1, etc. The maximum value of the control is the set of valid pads. 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun.. _dv-control-id: 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunDigital Video Control IDs 36*4882a593Smuzhiyun========================= 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun``V4L2_CID_DV_CLASS (class)`` 39*4882a593Smuzhiyun The Digital Video class descriptor. 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun``V4L2_CID_DV_TX_HOTPLUG (bitmask)`` 42*4882a593Smuzhiyun Many connectors have a hotplug pin which is high if EDID information 43*4882a593Smuzhiyun is available from the source. This control shows the state of the 44*4882a593Smuzhiyun hotplug pin as seen by the transmitter. Each bit corresponds to an 45*4882a593Smuzhiyun output pad on the transmitter. If an output pad does not have an 46*4882a593Smuzhiyun associated hotplug pin, then the bit for that pad will be 0. This 47*4882a593Smuzhiyun read-only control is applicable to DVI-D, HDMI and DisplayPort 48*4882a593Smuzhiyun connectors. 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun``V4L2_CID_DV_TX_RXSENSE (bitmask)`` 51*4882a593Smuzhiyun Rx Sense is the detection of pull-ups on the TMDS clock lines. This 52*4882a593Smuzhiyun normally means that the sink has left/entered standby (i.e. the 53*4882a593Smuzhiyun transmitter can sense that the receiver is ready to receive video). 54*4882a593Smuzhiyun Each bit corresponds to an output pad on the transmitter. If an 55*4882a593Smuzhiyun output pad does not have an associated Rx Sense, then the bit for 56*4882a593Smuzhiyun that pad will be 0. This read-only control is applicable to DVI-D 57*4882a593Smuzhiyun and HDMI devices. 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun``V4L2_CID_DV_TX_EDID_PRESENT (bitmask)`` 60*4882a593Smuzhiyun When the transmitter sees the hotplug signal from the receiver it 61*4882a593Smuzhiyun will attempt to read the EDID. If set, then the transmitter has read 62*4882a593Smuzhiyun at least the first block (= 128 bytes). Each bit corresponds to an 63*4882a593Smuzhiyun output pad on the transmitter. If an output pad does not support 64*4882a593Smuzhiyun EDIDs, then the bit for that pad will be 0. This read-only control 65*4882a593Smuzhiyun is applicable to VGA, DVI-A/D, HDMI and DisplayPort connectors. 66*4882a593Smuzhiyun 67*4882a593Smuzhiyun``V4L2_CID_DV_TX_MODE`` 68*4882a593Smuzhiyun (enum) 69*4882a593Smuzhiyun 70*4882a593Smuzhiyunenum v4l2_dv_tx_mode - 71*4882a593Smuzhiyun HDMI transmitters can transmit in DVI-D mode (just video) or in HDMI 72*4882a593Smuzhiyun mode (video + audio + auxiliary data). This control selects which 73*4882a593Smuzhiyun mode to use: V4L2_DV_TX_MODE_DVI_D or V4L2_DV_TX_MODE_HDMI. 74*4882a593Smuzhiyun This control is applicable to HDMI connectors. 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun``V4L2_CID_DV_TX_RGB_RANGE`` 77*4882a593Smuzhiyun (enum) 78*4882a593Smuzhiyun 79*4882a593Smuzhiyunenum v4l2_dv_rgb_range - 80*4882a593Smuzhiyun Select the quantization range for RGB output. V4L2_DV_RANGE_AUTO 81*4882a593Smuzhiyun follows the RGB quantization range specified in the standard for the 82*4882a593Smuzhiyun video interface (ie. :ref:`cea861` for HDMI). 83*4882a593Smuzhiyun V4L2_DV_RANGE_LIMITED and V4L2_DV_RANGE_FULL override the 84*4882a593Smuzhiyun standard to be compatible with sinks that have not implemented the 85*4882a593Smuzhiyun standard correctly (unfortunately quite common for HDMI and DVI-D). 86*4882a593Smuzhiyun Full range allows all possible values to be used whereas limited 87*4882a593Smuzhiyun range sets the range to (16 << (N-8)) - (235 << (N-8)) where N is 88*4882a593Smuzhiyun the number of bits per component. This control is applicable to VGA, 89*4882a593Smuzhiyun DVI-A/D, HDMI and DisplayPort connectors. 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun``V4L2_CID_DV_TX_IT_CONTENT_TYPE`` 92*4882a593Smuzhiyun (enum) 93*4882a593Smuzhiyun 94*4882a593Smuzhiyunenum v4l2_dv_it_content_type - 95*4882a593Smuzhiyun Configures the IT Content Type of the transmitted video. This 96*4882a593Smuzhiyun information is sent over HDMI and DisplayPort connectors as part of 97*4882a593Smuzhiyun the AVI InfoFrame. The term 'IT Content' is used for content that 98*4882a593Smuzhiyun originates from a computer as opposed to content from a TV broadcast 99*4882a593Smuzhiyun or an analog source. The enum v4l2_dv_it_content_type defines 100*4882a593Smuzhiyun the possible content types: 101*4882a593Smuzhiyun 102*4882a593Smuzhiyun.. tabularcolumns:: |p{7.3cm}|p{10.4cm}| 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun.. flat-table:: 105*4882a593Smuzhiyun :header-rows: 0 106*4882a593Smuzhiyun :stub-columns: 0 107*4882a593Smuzhiyun 108*4882a593Smuzhiyun * - ``V4L2_DV_IT_CONTENT_TYPE_GRAPHICS`` 109*4882a593Smuzhiyun - Graphics content. Pixel data should be passed unfiltered and 110*4882a593Smuzhiyun without analog reconstruction. 111*4882a593Smuzhiyun * - ``V4L2_DV_IT_CONTENT_TYPE_PHOTO`` 112*4882a593Smuzhiyun - Photo content. The content is derived from digital still pictures. 113*4882a593Smuzhiyun The content should be passed through with minimal scaling and 114*4882a593Smuzhiyun picture enhancements. 115*4882a593Smuzhiyun * - ``V4L2_DV_IT_CONTENT_TYPE_CINEMA`` 116*4882a593Smuzhiyun - Cinema content. 117*4882a593Smuzhiyun * - ``V4L2_DV_IT_CONTENT_TYPE_GAME`` 118*4882a593Smuzhiyun - Game content. Audio and video latency should be minimized. 119*4882a593Smuzhiyun * - ``V4L2_DV_IT_CONTENT_TYPE_NO_ITC`` 120*4882a593Smuzhiyun - No IT Content information is available and the ITC bit in the AVI 121*4882a593Smuzhiyun InfoFrame is set to 0. 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun``V4L2_CID_DV_RX_POWER_PRESENT (bitmask)`` 126*4882a593Smuzhiyun Detects whether the receiver receives power from the source (e.g. 127*4882a593Smuzhiyun HDMI carries 5V on one of the pins). This is often used to power an 128*4882a593Smuzhiyun eeprom which contains EDID information, such that the source can 129*4882a593Smuzhiyun read the EDID even if the sink is in standby/power off. Each bit 130*4882a593Smuzhiyun corresponds to an input pad on the receiver. If an input pad 131*4882a593Smuzhiyun cannot detect whether power is present, then the bit for that pad 132*4882a593Smuzhiyun will be 0. This read-only control is applicable to DVI-D, HDMI and 133*4882a593Smuzhiyun DisplayPort connectors. 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun``V4L2_CID_DV_RX_RGB_RANGE`` 136*4882a593Smuzhiyun (enum) 137*4882a593Smuzhiyun 138*4882a593Smuzhiyunenum v4l2_dv_rgb_range - 139*4882a593Smuzhiyun Select the quantization range for RGB input. V4L2_DV_RANGE_AUTO 140*4882a593Smuzhiyun follows the RGB quantization range specified in the standard for the 141*4882a593Smuzhiyun video interface (ie. :ref:`cea861` for HDMI). 142*4882a593Smuzhiyun V4L2_DV_RANGE_LIMITED and V4L2_DV_RANGE_FULL override the 143*4882a593Smuzhiyun standard to be compatible with sources that have not implemented the 144*4882a593Smuzhiyun standard correctly (unfortunately quite common for HDMI and DVI-D). 145*4882a593Smuzhiyun Full range allows all possible values to be used whereas limited 146*4882a593Smuzhiyun range sets the range to (16 << (N-8)) - (235 << (N-8)) where N is 147*4882a593Smuzhiyun the number of bits per component. This control is applicable to VGA, 148*4882a593Smuzhiyun DVI-A/D, HDMI and DisplayPort connectors. 149*4882a593Smuzhiyun 150*4882a593Smuzhiyun``V4L2_CID_DV_RX_IT_CONTENT_TYPE`` 151*4882a593Smuzhiyun (enum) 152*4882a593Smuzhiyun 153*4882a593Smuzhiyunenum v4l2_dv_it_content_type - 154*4882a593Smuzhiyun Reads the IT Content Type of the received video. This information is 155*4882a593Smuzhiyun sent over HDMI and DisplayPort connectors as part of the AVI 156*4882a593Smuzhiyun InfoFrame. The term 'IT Content' is used for content that originates 157*4882a593Smuzhiyun from a computer as opposed to content from a TV broadcast or an 158*4882a593Smuzhiyun analog source. See ``V4L2_CID_DV_TX_IT_CONTENT_TYPE`` for the 159*4882a593Smuzhiyun available content types. 160