1*4882a593Smuzhiyun.. SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun======================= 4*4882a593SmuzhiyunIntel(R) Trace Hub (TH) 5*4882a593Smuzhiyun======================= 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunOverview 8*4882a593Smuzhiyun-------- 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunIntel(R) Trace Hub (TH) is a set of hardware blocks that produce, 11*4882a593Smuzhiyunswitch and output trace data from multiple hardware and software 12*4882a593Smuzhiyunsources over several types of trace output ports encoded in System 13*4882a593SmuzhiyunTrace Protocol (MIPI STPv2) and is intended to perform full system 14*4882a593Smuzhiyundebugging. For more information on the hardware, see Intel(R) Trace 15*4882a593SmuzhiyunHub developer's manual [1]. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunIt consists of trace sources, trace destinations (outputs) and a 18*4882a593Smuzhiyunswitch (Global Trace Hub, GTH). These devices are placed on a bus of 19*4882a593Smuzhiyuntheir own ("intel_th"), where they can be discovered and configured 20*4882a593Smuzhiyunvia sysfs attributes. 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunCurrently, the following Intel TH subdevices (blocks) are supported: 23*4882a593Smuzhiyun - Software Trace Hub (STH), trace source, which is a System Trace 24*4882a593Smuzhiyun Module (STM) device, 25*4882a593Smuzhiyun - Memory Storage Unit (MSU), trace output, which allows storing 26*4882a593Smuzhiyun trace hub output in system memory, 27*4882a593Smuzhiyun - Parallel Trace Interface output (PTI), trace output to an external 28*4882a593Smuzhiyun debug host via a PTI port, 29*4882a593Smuzhiyun - Global Trace Hub (GTH), which is a switch and a central component 30*4882a593Smuzhiyun of Intel(R) Trace Hub architecture. 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunCommon attributes for output devices are described in 33*4882a593SmuzhiyunDocumentation/ABI/testing/sysfs-bus-intel_th-output-devices, the most 34*4882a593Smuzhiyunnotable of them is "active", which enables or disables trace output 35*4882a593Smuzhiyuninto that particular output device. 36*4882a593Smuzhiyun 37*4882a593SmuzhiyunGTH allows directing different STP masters into different output ports 38*4882a593Smuzhiyunvia its "masters" attribute group. More detailed GTH interface 39*4882a593Smuzhiyundescription is at Documentation/ABI/testing/sysfs-bus-intel_th-devices-gth. 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunSTH registers an stm class device, through which it provides interface 42*4882a593Smuzhiyunto userspace and kernelspace software trace sources. See 43*4882a593SmuzhiyunDocumentation/trace/stm.rst for more information on that. 44*4882a593Smuzhiyun 45*4882a593SmuzhiyunMSU can be configured to collect trace data into a system memory 46*4882a593Smuzhiyunbuffer, which can later on be read from its device nodes via read() or 47*4882a593Smuzhiyunmmap() interface and directed to a "software sink" driver that will 48*4882a593Smuzhiyunconsume the data and/or relay it further. 49*4882a593Smuzhiyun 50*4882a593SmuzhiyunOn the whole, Intel(R) Trace Hub does not require any special 51*4882a593Smuzhiyunuserspace software to function; everything can be configured, started 52*4882a593Smuzhiyunand collected via sysfs attributes, and device nodes. 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun[1] https://software.intel.com/sites/default/files/managed/d3/3c/intel-th-developer-manual.pdf 55*4882a593Smuzhiyun 56*4882a593SmuzhiyunBus and Subdevices 57*4882a593Smuzhiyun------------------ 58*4882a593Smuzhiyun 59*4882a593SmuzhiyunFor each Intel TH device in the system a bus of its own is 60*4882a593Smuzhiyuncreated and assigned an id number that reflects the order in which TH 61*4882a593Smuzhiyundevices were enumerated. All TH subdevices (devices on intel_th bus) 62*4882a593Smuzhiyunbegin with this id: 0-gth, 0-msc0, 0-msc1, 0-pti, 0-sth, which is 63*4882a593Smuzhiyunfollowed by device's name and an optional index. 64*4882a593Smuzhiyun 65*4882a593SmuzhiyunOutput devices also get a device node in /dev/intel_thN, where N is 66*4882a593Smuzhiyunthe Intel TH device id. For example, MSU's memory buffers, when 67*4882a593Smuzhiyunallocated, are accessible via /dev/intel_th0/msc{0,1}. 68*4882a593Smuzhiyun 69*4882a593SmuzhiyunQuick example 70*4882a593Smuzhiyun------------- 71*4882a593Smuzhiyun 72*4882a593Smuzhiyun# figure out which GTH port is the first memory controller:: 73*4882a593Smuzhiyun 74*4882a593Smuzhiyun $ cat /sys/bus/intel_th/devices/0-msc0/port 75*4882a593Smuzhiyun 0 76*4882a593Smuzhiyun 77*4882a593Smuzhiyun# looks like it's port 0, configure master 33 to send data to port 0:: 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun $ echo 0 > /sys/bus/intel_th/devices/0-gth/masters/33 80*4882a593Smuzhiyun 81*4882a593Smuzhiyun# allocate a 2-windowed multiblock buffer on the first memory 82*4882a593Smuzhiyun# controller, each with 64 pages:: 83*4882a593Smuzhiyun 84*4882a593Smuzhiyun $ echo multi > /sys/bus/intel_th/devices/0-msc0/mode 85*4882a593Smuzhiyun $ echo 64,64 > /sys/bus/intel_th/devices/0-msc0/nr_pages 86*4882a593Smuzhiyun 87*4882a593Smuzhiyun# enable wrapping for this controller, too:: 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun $ echo 1 > /sys/bus/intel_th/devices/0-msc0/wrap 90*4882a593Smuzhiyun 91*4882a593Smuzhiyun# and enable tracing into this port:: 92*4882a593Smuzhiyun 93*4882a593Smuzhiyun $ echo 1 > /sys/bus/intel_th/devices/0-msc0/active 94*4882a593Smuzhiyun 95*4882a593Smuzhiyun# .. send data to master 33, see stm.txt for more details .. 96*4882a593Smuzhiyun# .. wait for traces to pile up .. 97*4882a593Smuzhiyun# .. and stop the trace:: 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun $ echo 0 > /sys/bus/intel_th/devices/0-msc0/active 100*4882a593Smuzhiyun 101*4882a593Smuzhiyun# and now you can collect the trace from the device node:: 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun $ cat /dev/intel_th0/msc0 > my_stp_trace 104*4882a593Smuzhiyun 105*4882a593SmuzhiyunHost Debugger Mode 106*4882a593Smuzhiyun------------------ 107*4882a593Smuzhiyun 108*4882a593SmuzhiyunIt is possible to configure the Trace Hub and control its trace 109*4882a593Smuzhiyuncapture from a remote debug host, which should be connected via one of 110*4882a593Smuzhiyunthe hardware debugging interfaces, which will then be used to both 111*4882a593Smuzhiyuncontrol Intel Trace Hub and transfer its trace data to the debug host. 112*4882a593Smuzhiyun 113*4882a593SmuzhiyunThe driver needs to be told that such an arrangement is taking place 114*4882a593Smuzhiyunso that it does not touch any capture/port configuration and avoids 115*4882a593Smuzhiyunconflicting with the debug host's configuration accesses. The only 116*4882a593Smuzhiyunactivity that the driver will perform in this mode is collecting 117*4882a593Smuzhiyunsoftware traces to the Software Trace Hub (an stm class device). The 118*4882a593Smuzhiyunuser is still responsible for setting up adequate master/channel 119*4882a593Smuzhiyunmappings that the decoder on the receiving end would recognize. 120*4882a593Smuzhiyun 121*4882a593SmuzhiyunIn order to enable the host mode, set the 'host_mode' parameter of the 122*4882a593Smuzhiyun'intel_th' kernel module to 'y'. None of the virtual output devices 123*4882a593Smuzhiyunwill show up on the intel_th bus. Also, trace configuration and 124*4882a593Smuzhiyuncapture controlling attribute groups of the 'gth' device will not be 125*4882a593Smuzhiyunexposed. The 'sth' device will operate as usual. 126*4882a593Smuzhiyun 127*4882a593SmuzhiyunSoftware Sinks 128*4882a593Smuzhiyun-------------- 129*4882a593Smuzhiyun 130*4882a593SmuzhiyunThe Memory Storage Unit (MSU) driver provides an in-kernel API for 131*4882a593Smuzhiyundrivers to register themselves as software sinks for the trace data. 132*4882a593SmuzhiyunSuch drivers can further export the data via other devices, such as 133*4882a593SmuzhiyunUSB device controllers or network cards. 134*4882a593Smuzhiyun 135*4882a593SmuzhiyunThe API has two main parts:: 136*4882a593Smuzhiyun - notifying the software sink that a particular window is full, and 137*4882a593Smuzhiyun "locking" that window, that is, making it unavailable for the trace 138*4882a593Smuzhiyun collection; when this happens, the MSU driver will automatically 139*4882a593Smuzhiyun switch to the next window in the buffer if it is unlocked, or stop 140*4882a593Smuzhiyun the trace capture if it's not; 141*4882a593Smuzhiyun - tracking the "locked" state of windows and providing a way for the 142*4882a593Smuzhiyun software sink driver to notify the MSU driver when a window is 143*4882a593Smuzhiyun unlocked and can be used again to collect trace data. 144*4882a593Smuzhiyun 145*4882a593SmuzhiyunAn example sink driver, msu-sink illustrates the implementation of a 146*4882a593Smuzhiyunsoftware sink. Functionally, it simply unlocks windows as soon as they 147*4882a593Smuzhiyunare full, keeping the MSU running in a circular buffer mode. Unlike the 148*4882a593Smuzhiyun"multi" mode, it will fill out all the windows in the buffer as opposed 149*4882a593Smuzhiyunto just the first one. It can be enabled by writing "sink" to the "mode" 150*4882a593Smuzhiyunfile (assuming msu-sink.ko is loaded). 151