1*4882a593Smuzhiyun================ 2*4882a593SmuzhiyunMSR Trace Events 3*4882a593Smuzhiyun================ 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunThe x86 kernel supports tracing most MSR (Model Specific Register) accesses. 6*4882a593SmuzhiyunTo see the definition of the MSRs on Intel systems please see the SDM 7*4882a593Smuzhiyunat https://www.intel.com/sdm (Volume 3) 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunAvailable trace points: 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun/sys/kernel/debug/tracing/events/msr/ 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunTrace MSR reads: 14*4882a593Smuzhiyun 15*4882a593Smuzhiyunread_msr 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun - msr: MSR number 18*4882a593Smuzhiyun - val: Value written 19*4882a593Smuzhiyun - failed: 1 if the access failed, otherwise 0 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunTrace MSR writes: 23*4882a593Smuzhiyun 24*4882a593Smuzhiyunwrite_msr 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun - msr: MSR number 27*4882a593Smuzhiyun - val: Value written 28*4882a593Smuzhiyun - failed: 1 if the access failed, otherwise 0 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunTrace RDPMC in kernel: 32*4882a593Smuzhiyun 33*4882a593Smuzhiyunrdpmc 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunThe trace data can be post processed with the postprocess/decode_msr.py script:: 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun cat /sys/kernel/debug/tracing/trace | decode_msr.py /usr/src/linux/include/asm/msr-index.h 38*4882a593Smuzhiyun 39*4882a593Smuzhiyunto add symbolic MSR names. 40*4882a593Smuzhiyun 41