1*4882a593Smuzhiyun.. SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun 3*4882a593Smuzhiyun======================= 4*4882a593SmuzhiyunThe 53c700 Driver Notes 5*4882a593Smuzhiyun======================= 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunGeneral Description 8*4882a593Smuzhiyun=================== 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunThis driver supports the 53c700 and 53c700-66 chips. It also supports 11*4882a593Smuzhiyunthe 53c710 but only in 53c700 emulation mode. It is full featured and 12*4882a593Smuzhiyundoes sync (-66 and 710 only), disconnects and tag command queueing. 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunSince the 53c700 must be interfaced to a bus, you need to wrapper the 15*4882a593Smuzhiyuncard detector around this driver. For an example, see the 16*4882a593SmuzhiyunNCR_D700.[ch] or lasi700.[ch] files. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunThe comments in the 53c700.[ch] files tell you which parts you need to 19*4882a593Smuzhiyunfill in to get the driver working. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun 22*4882a593SmuzhiyunCompile Time Flags 23*4882a593Smuzhiyun================== 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunA compile time flag is:: 26*4882a593Smuzhiyun 27*4882a593Smuzhiyun CONFIG_53C700_LE_ON_BE 28*4882a593Smuzhiyun 29*4882a593Smuzhiyundefine if the chipset must be supported in little endian mode on a big 30*4882a593Smuzhiyunendian architecture (used for the 700 on parisc). 31*4882a593Smuzhiyun 32*4882a593Smuzhiyun 33*4882a593SmuzhiyunUsing the Chip Core Driver 34*4882a593Smuzhiyun========================== 35*4882a593Smuzhiyun 36*4882a593SmuzhiyunIn order to plumb the 53c700 chip core driver into a working SCSI 37*4882a593Smuzhiyundriver, you need to know three things about the way the chip is wired 38*4882a593Smuzhiyuninto your system (or expansion card). 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun1. The clock speed of the SCSI core 41*4882a593Smuzhiyun2. The interrupt line used 42*4882a593Smuzhiyun3. The memory (or io space) location of the 53c700 registers. 43*4882a593Smuzhiyun 44*4882a593SmuzhiyunOptionally, you may also need to know other things, like how to read 45*4882a593Smuzhiyunthe SCSI Id from the card bios or whether the chip is wired for 46*4882a593Smuzhiyundifferential operation. 47*4882a593Smuzhiyun 48*4882a593SmuzhiyunUsually you can find items 2. and 3. from general spec. documents or 49*4882a593Smuzhiyuneven by examining the configuration of a working driver under another 50*4882a593Smuzhiyunoperating system. 51*4882a593Smuzhiyun 52*4882a593SmuzhiyunThe clock speed is usually buried deep in the technical literature. 53*4882a593SmuzhiyunIt is required because it is used to set up both the synchronous and 54*4882a593Smuzhiyunasynchronous dividers for the chip. As a general rule of thumb, 55*4882a593Smuzhiyunmanufacturers set the clock speed at the lowest possible setting 56*4882a593Smuzhiyunconsistent with the best operation of the chip (although some choose 57*4882a593Smuzhiyunto drive it off the CPU or bus clock rather than going to the expense 58*4882a593Smuzhiyunof an extra clock chip). The best operation clock speeds are: 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun========= ===== 61*4882a593Smuzhiyun53c700 25MHz 62*4882a593Smuzhiyun53c700-66 50MHz 63*4882a593Smuzhiyun53c710 40Mhz 64*4882a593Smuzhiyun========= ===== 65*4882a593Smuzhiyun 66*4882a593SmuzhiyunWriting Your Glue Driver 67*4882a593Smuzhiyun======================== 68*4882a593Smuzhiyun 69*4882a593SmuzhiyunThis will be a standard SCSI driver (I don't know of a good document 70*4882a593Smuzhiyundescribing this, just copy from some other driver) with at least a 71*4882a593Smuzhiyundetect and release entry. 72*4882a593Smuzhiyun 73*4882a593SmuzhiyunIn the detect routine, you need to allocate a struct 74*4882a593SmuzhiyunNCR_700_Host_Parameters sized memory area and clear it (so that the 75*4882a593Smuzhiyundefault values for everything are 0). Then you must fill in the 76*4882a593Smuzhiyunparameters that matter to you (see below), plumb the NCR_700_intr 77*4882a593Smuzhiyunroutine into the interrupt line and call NCR_700_detect with the host 78*4882a593Smuzhiyuntemplate and the new parameters as arguments. You should also call 79*4882a593Smuzhiyunthe relevant request_*_region function and place the register base 80*4882a593Smuzhiyunaddress into the 'base' pointer of the host parameters. 81*4882a593Smuzhiyun 82*4882a593SmuzhiyunIn the release routine, you must free the NCR_700_Host_Parameters that 83*4882a593Smuzhiyunyou allocated, call the corresponding release_*_region and free the 84*4882a593Smuzhiyuninterrupt. 85*4882a593Smuzhiyun 86*4882a593SmuzhiyunHandling Interrupts 87*4882a593Smuzhiyun------------------- 88*4882a593Smuzhiyun 89*4882a593SmuzhiyunIn general, you should just plumb the card's interrupt line in with 90*4882a593Smuzhiyun 91*4882a593Smuzhiyunrequest_irq(irq, NCR_700_intr, <irq flags>, <driver name>, host); 92*4882a593Smuzhiyun 93*4882a593Smuzhiyunwhere host is the return from the relevant NCR_700_detect() routine. 94*4882a593Smuzhiyun 95*4882a593SmuzhiyunYou may also write your own interrupt handling routine which calls 96*4882a593SmuzhiyunNCR_700_intr() directly. However, you should only really do this if 97*4882a593Smuzhiyunyou have a card with more than one chip on it and you can read a 98*4882a593Smuzhiyunregister to tell which set of chips wants the interrupt. 99*4882a593Smuzhiyun 100*4882a593SmuzhiyunSettable NCR_700_Host_Parameters 101*4882a593Smuzhiyun-------------------------------- 102*4882a593Smuzhiyun 103*4882a593SmuzhiyunThe following are a list of the user settable parameters: 104*4882a593Smuzhiyun 105*4882a593Smuzhiyunclock: (MANDATORY) 106*4882a593Smuzhiyun Set to the clock speed of the chip in MHz. 107*4882a593Smuzhiyun 108*4882a593Smuzhiyunbase: (MANDATORY) 109*4882a593Smuzhiyun Set to the base of the io or mem region for the register set. On 64 110*4882a593Smuzhiyun bit architectures this is only 32 bits wide, so the registers must be 111*4882a593Smuzhiyun mapped into the low 32 bits of memory. 112*4882a593Smuzhiyun 113*4882a593Smuzhiyunpci_dev: (OPTIONAL) 114*4882a593Smuzhiyun Set to the PCI board device. Leave NULL for a non-pci board. This is 115*4882a593Smuzhiyun used for the pci_alloc_consistent() and pci_map_*() functions. 116*4882a593Smuzhiyun 117*4882a593Smuzhiyundmode_extra: (OPTIONAL, 53c710 only) 118*4882a593Smuzhiyun Extra flags for the DMODE register. These are used to control bus 119*4882a593Smuzhiyun output pins on the 710. The settings should be a combination of 120*4882a593Smuzhiyun DMODE_FC1 and DMODE_FC2. What these pins actually do is entirely up 121*4882a593Smuzhiyun to the board designer. Usually it is safe to ignore this setting. 122*4882a593Smuzhiyun 123*4882a593Smuzhiyundifferential: (OPTIONAL) 124*4882a593Smuzhiyun Set to 1 if the chip drives a differential bus. 125*4882a593Smuzhiyun 126*4882a593Smuzhiyunforce_le_on_be: (OPTIONAL, only if CONFIG_53C700_LE_ON_BE is set) 127*4882a593Smuzhiyun Set to 1 if the chip is operating in little endian mode on a big 128*4882a593Smuzhiyun endian architecture. 129*4882a593Smuzhiyun 130*4882a593Smuzhiyunchip710: (OPTIONAL) 131*4882a593Smuzhiyun Set to 1 if the chip is a 53c710. 132*4882a593Smuzhiyun 133*4882a593Smuzhiyunburst_disable: (OPTIONAL, 53c710 only) 134*4882a593Smuzhiyun Disable 8 byte bursting for DMA transfers. 135