1*4882a593Smuzhiyun======================= 2*4882a593SmuzhiyunPower Capping Framework 3*4882a593Smuzhiyun======================= 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunThe power capping framework provides a consistent interface between the kernel 6*4882a593Smuzhiyunand the user space that allows power capping drivers to expose the settings to 7*4882a593Smuzhiyunuser space in a uniform way. 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunTerminology 10*4882a593Smuzhiyun=========== 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunThe framework exposes power capping devices to user space via sysfs in the 13*4882a593Smuzhiyunform of a tree of objects. The objects at the root level of the tree represent 14*4882a593Smuzhiyun'control types', which correspond to different methods of power capping. For 15*4882a593Smuzhiyunexample, the intel-rapl control type represents the Intel "Running Average 16*4882a593SmuzhiyunPower Limit" (RAPL) technology, whereas the 'idle-injection' control type 17*4882a593Smuzhiyuncorresponds to the use of idle injection for controlling power. 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunPower zones represent different parts of the system, which can be controlled and 20*4882a593Smuzhiyunmonitored using the power capping method determined by the control type the 21*4882a593Smuzhiyungiven zone belongs to. They each contain attributes for monitoring power, as 22*4882a593Smuzhiyunwell as controls represented in the form of power constraints. If the parts of 23*4882a593Smuzhiyunthe system represented by different power zones are hierarchical (that is, one 24*4882a593Smuzhiyunbigger part consists of multiple smaller parts that each have their own power 25*4882a593Smuzhiyuncontrols), those power zones may also be organized in a hierarchy with one 26*4882a593Smuzhiyunparent power zone containing multiple subzones and so on to reflect the power 27*4882a593Smuzhiyuncontrol topology of the system. In that case, it is possible to apply power 28*4882a593Smuzhiyuncapping to a set of devices together using the parent power zone and if more 29*4882a593Smuzhiyunfine grained control is required, it can be applied through the subzones. 30*4882a593Smuzhiyun 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunExample sysfs interface tree:: 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /sys/devices/virtual/powercap 35*4882a593Smuzhiyun └──intel-rapl 36*4882a593Smuzhiyun ├──intel-rapl:0 37*4882a593Smuzhiyun │ ├──constraint_0_name 38*4882a593Smuzhiyun │ ├──constraint_0_power_limit_uw 39*4882a593Smuzhiyun │ ├──constraint_0_time_window_us 40*4882a593Smuzhiyun │ ├──constraint_1_name 41*4882a593Smuzhiyun │ ├──constraint_1_power_limit_uw 42*4882a593Smuzhiyun │ ├──constraint_1_time_window_us 43*4882a593Smuzhiyun │ ├──device -> ../../intel-rapl 44*4882a593Smuzhiyun │ ├──energy_uj 45*4882a593Smuzhiyun │ ├──intel-rapl:0:0 46*4882a593Smuzhiyun │ │ ├──constraint_0_name 47*4882a593Smuzhiyun │ │ ├──constraint_0_power_limit_uw 48*4882a593Smuzhiyun │ │ ├──constraint_0_time_window_us 49*4882a593Smuzhiyun │ │ ├──constraint_1_name 50*4882a593Smuzhiyun │ │ ├──constraint_1_power_limit_uw 51*4882a593Smuzhiyun │ │ ├──constraint_1_time_window_us 52*4882a593Smuzhiyun │ │ ├──device -> ../../intel-rapl:0 53*4882a593Smuzhiyun │ │ ├──energy_uj 54*4882a593Smuzhiyun │ │ ├──max_energy_range_uj 55*4882a593Smuzhiyun │ │ ├──name 56*4882a593Smuzhiyun │ │ ├──enabled 57*4882a593Smuzhiyun │ │ ├──power 58*4882a593Smuzhiyun │ │ │ ├──async 59*4882a593Smuzhiyun │ │ │ [] 60*4882a593Smuzhiyun │ │ ├──subsystem -> ../../../../../../class/power_cap 61*4882a593Smuzhiyun │ │ └──uevent 62*4882a593Smuzhiyun │ ├──intel-rapl:0:1 63*4882a593Smuzhiyun │ │ ├──constraint_0_name 64*4882a593Smuzhiyun │ │ ├──constraint_0_power_limit_uw 65*4882a593Smuzhiyun │ │ ├──constraint_0_time_window_us 66*4882a593Smuzhiyun │ │ ├──constraint_1_name 67*4882a593Smuzhiyun │ │ ├──constraint_1_power_limit_uw 68*4882a593Smuzhiyun │ │ ├──constraint_1_time_window_us 69*4882a593Smuzhiyun │ │ ├──device -> ../../intel-rapl:0 70*4882a593Smuzhiyun │ │ ├──energy_uj 71*4882a593Smuzhiyun │ │ ├──max_energy_range_uj 72*4882a593Smuzhiyun │ │ ├──name 73*4882a593Smuzhiyun │ │ ├──enabled 74*4882a593Smuzhiyun │ │ ├──power 75*4882a593Smuzhiyun │ │ │ ├──async 76*4882a593Smuzhiyun │ │ │ [] 77*4882a593Smuzhiyun │ │ ├──subsystem -> ../../../../../../class/power_cap 78*4882a593Smuzhiyun │ │ └──uevent 79*4882a593Smuzhiyun │ ├──max_energy_range_uj 80*4882a593Smuzhiyun │ ├──max_power_range_uw 81*4882a593Smuzhiyun │ ├──name 82*4882a593Smuzhiyun │ ├──enabled 83*4882a593Smuzhiyun │ ├──power 84*4882a593Smuzhiyun │ │ ├──async 85*4882a593Smuzhiyun │ │ [] 86*4882a593Smuzhiyun │ ├──subsystem -> ../../../../../class/power_cap 87*4882a593Smuzhiyun │ ├──enabled 88*4882a593Smuzhiyun │ ├──uevent 89*4882a593Smuzhiyun ├──intel-rapl:1 90*4882a593Smuzhiyun │ ├──constraint_0_name 91*4882a593Smuzhiyun │ ├──constraint_0_power_limit_uw 92*4882a593Smuzhiyun │ ├──constraint_0_time_window_us 93*4882a593Smuzhiyun │ ├──constraint_1_name 94*4882a593Smuzhiyun │ ├──constraint_1_power_limit_uw 95*4882a593Smuzhiyun │ ├──constraint_1_time_window_us 96*4882a593Smuzhiyun │ ├──device -> ../../intel-rapl 97*4882a593Smuzhiyun │ ├──energy_uj 98*4882a593Smuzhiyun │ ├──intel-rapl:1:0 99*4882a593Smuzhiyun │ │ ├──constraint_0_name 100*4882a593Smuzhiyun │ │ ├──constraint_0_power_limit_uw 101*4882a593Smuzhiyun │ │ ├──constraint_0_time_window_us 102*4882a593Smuzhiyun │ │ ├──constraint_1_name 103*4882a593Smuzhiyun │ │ ├──constraint_1_power_limit_uw 104*4882a593Smuzhiyun │ │ ├──constraint_1_time_window_us 105*4882a593Smuzhiyun │ │ ├──device -> ../../intel-rapl:1 106*4882a593Smuzhiyun │ │ ├──energy_uj 107*4882a593Smuzhiyun │ │ ├──max_energy_range_uj 108*4882a593Smuzhiyun │ │ ├──name 109*4882a593Smuzhiyun │ │ ├──enabled 110*4882a593Smuzhiyun │ │ ├──power 111*4882a593Smuzhiyun │ │ │ ├──async 112*4882a593Smuzhiyun │ │ │ [] 113*4882a593Smuzhiyun │ │ ├──subsystem -> ../../../../../../class/power_cap 114*4882a593Smuzhiyun │ │ └──uevent 115*4882a593Smuzhiyun │ ├──intel-rapl:1:1 116*4882a593Smuzhiyun │ │ ├──constraint_0_name 117*4882a593Smuzhiyun │ │ ├──constraint_0_power_limit_uw 118*4882a593Smuzhiyun │ │ ├──constraint_0_time_window_us 119*4882a593Smuzhiyun │ │ ├──constraint_1_name 120*4882a593Smuzhiyun │ │ ├──constraint_1_power_limit_uw 121*4882a593Smuzhiyun │ │ ├──constraint_1_time_window_us 122*4882a593Smuzhiyun │ │ ├──device -> ../../intel-rapl:1 123*4882a593Smuzhiyun │ │ ├──energy_uj 124*4882a593Smuzhiyun │ │ ├──max_energy_range_uj 125*4882a593Smuzhiyun │ │ ├──name 126*4882a593Smuzhiyun │ │ ├──enabled 127*4882a593Smuzhiyun │ │ ├──power 128*4882a593Smuzhiyun │ │ │ ├──async 129*4882a593Smuzhiyun │ │ │ [] 130*4882a593Smuzhiyun │ │ ├──subsystem -> ../../../../../../class/power_cap 131*4882a593Smuzhiyun │ │ └──uevent 132*4882a593Smuzhiyun │ ├──max_energy_range_uj 133*4882a593Smuzhiyun │ ├──max_power_range_uw 134*4882a593Smuzhiyun │ ├──name 135*4882a593Smuzhiyun │ ├──enabled 136*4882a593Smuzhiyun │ ├──power 137*4882a593Smuzhiyun │ │ ├──async 138*4882a593Smuzhiyun │ │ [] 139*4882a593Smuzhiyun │ ├──subsystem -> ../../../../../class/power_cap 140*4882a593Smuzhiyun │ ├──uevent 141*4882a593Smuzhiyun ├──power 142*4882a593Smuzhiyun │ ├──async 143*4882a593Smuzhiyun │ [] 144*4882a593Smuzhiyun ├──subsystem -> ../../../../class/power_cap 145*4882a593Smuzhiyun ├──enabled 146*4882a593Smuzhiyun └──uevent 147*4882a593Smuzhiyun 148*4882a593SmuzhiyunThe above example illustrates a case in which the Intel RAPL technology, 149*4882a593Smuzhiyunavailable in Intel® IA-64 and IA-32 Processor Architectures, is used. There is one 150*4882a593Smuzhiyuncontrol type called intel-rapl which contains two power zones, intel-rapl:0 and 151*4882a593Smuzhiyunintel-rapl:1, representing CPU packages. Each of these power zones contains 152*4882a593Smuzhiyuntwo subzones, intel-rapl:j:0 and intel-rapl:j:1 (j = 0, 1), representing the 153*4882a593Smuzhiyun"core" and the "uncore" parts of the given CPU package, respectively. All of 154*4882a593Smuzhiyunthe zones and subzones contain energy monitoring attributes (energy_uj, 155*4882a593Smuzhiyunmax_energy_range_uj) and constraint attributes (constraint_*) allowing controls 156*4882a593Smuzhiyunto be applied (the constraints in the 'package' power zones apply to the whole 157*4882a593SmuzhiyunCPU packages and the subzone constraints only apply to the respective parts of 158*4882a593Smuzhiyunthe given package individually). Since Intel RAPL doesn't provide instantaneous 159*4882a593Smuzhiyunpower value, there is no power_uw attribute. 160*4882a593Smuzhiyun 161*4882a593SmuzhiyunIn addition to that, each power zone contains a name attribute, allowing the 162*4882a593Smuzhiyunpart of the system represented by that zone to be identified. 163*4882a593SmuzhiyunFor example:: 164*4882a593Smuzhiyun 165*4882a593Smuzhiyun cat /sys/class/power_cap/intel-rapl/intel-rapl:0/name 166*4882a593Smuzhiyun 167*4882a593Smuzhiyunpackage-0 168*4882a593Smuzhiyun--------- 169*4882a593Smuzhiyun 170*4882a593SmuzhiyunDepending on different power zones, the Intel RAPL technology allows 171*4882a593Smuzhiyunone or multiple constraints like short term, long term and peak power, 172*4882a593Smuzhiyunwith different time windows to be applied to each power zone. 173*4882a593SmuzhiyunAll the zones contain attributes representing the constraint names, 174*4882a593Smuzhiyunpower limits and the sizes of the time windows. Note that time window 175*4882a593Smuzhiyunis not applicable to peak power. Here, constraint_j_* attributes 176*4882a593Smuzhiyuncorrespond to the jth constraint (j = 0,1,2). 177*4882a593Smuzhiyun 178*4882a593SmuzhiyunFor example:: 179*4882a593Smuzhiyun 180*4882a593Smuzhiyun constraint_0_name 181*4882a593Smuzhiyun constraint_0_power_limit_uw 182*4882a593Smuzhiyun constraint_0_time_window_us 183*4882a593Smuzhiyun constraint_1_name 184*4882a593Smuzhiyun constraint_1_power_limit_uw 185*4882a593Smuzhiyun constraint_1_time_window_us 186*4882a593Smuzhiyun constraint_2_name 187*4882a593Smuzhiyun constraint_2_power_limit_uw 188*4882a593Smuzhiyun constraint_2_time_window_us 189*4882a593Smuzhiyun 190*4882a593SmuzhiyunPower Zone Attributes 191*4882a593Smuzhiyun===================== 192*4882a593Smuzhiyun 193*4882a593SmuzhiyunMonitoring attributes 194*4882a593Smuzhiyun--------------------- 195*4882a593Smuzhiyun 196*4882a593Smuzhiyunenergy_uj (rw) 197*4882a593Smuzhiyun Current energy counter in micro joules. Write "0" to reset. 198*4882a593Smuzhiyun If the counter can not be reset, then this attribute is read only. 199*4882a593Smuzhiyun 200*4882a593Smuzhiyunmax_energy_range_uj (ro) 201*4882a593Smuzhiyun Range of the above energy counter in micro-joules. 202*4882a593Smuzhiyun 203*4882a593Smuzhiyunpower_uw (ro) 204*4882a593Smuzhiyun Current power in micro watts. 205*4882a593Smuzhiyun 206*4882a593Smuzhiyunmax_power_range_uw (ro) 207*4882a593Smuzhiyun Range of the above power value in micro-watts. 208*4882a593Smuzhiyun 209*4882a593Smuzhiyunname (ro) 210*4882a593Smuzhiyun Name of this power zone. 211*4882a593Smuzhiyun 212*4882a593SmuzhiyunIt is possible that some domains have both power ranges and energy counter ranges; 213*4882a593Smuzhiyunhowever, only one is mandatory. 214*4882a593Smuzhiyun 215*4882a593SmuzhiyunConstraints 216*4882a593Smuzhiyun----------- 217*4882a593Smuzhiyun 218*4882a593Smuzhiyunconstraint_X_power_limit_uw (rw) 219*4882a593Smuzhiyun Power limit in micro watts, which should be applicable for the 220*4882a593Smuzhiyun time window specified by "constraint_X_time_window_us". 221*4882a593Smuzhiyun 222*4882a593Smuzhiyunconstraint_X_time_window_us (rw) 223*4882a593Smuzhiyun Time window in micro seconds. 224*4882a593Smuzhiyun 225*4882a593Smuzhiyunconstraint_X_name (ro) 226*4882a593Smuzhiyun An optional name of the constraint 227*4882a593Smuzhiyun 228*4882a593Smuzhiyunconstraint_X_max_power_uw(ro) 229*4882a593Smuzhiyun Maximum allowed power in micro watts. 230*4882a593Smuzhiyun 231*4882a593Smuzhiyunconstraint_X_min_power_uw(ro) 232*4882a593Smuzhiyun Minimum allowed power in micro watts. 233*4882a593Smuzhiyun 234*4882a593Smuzhiyunconstraint_X_max_time_window_us(ro) 235*4882a593Smuzhiyun Maximum allowed time window in micro seconds. 236*4882a593Smuzhiyun 237*4882a593Smuzhiyunconstraint_X_min_time_window_us(ro) 238*4882a593Smuzhiyun Minimum allowed time window in micro seconds. 239*4882a593Smuzhiyun 240*4882a593SmuzhiyunExcept power_limit_uw and time_window_us other fields are optional. 241*4882a593Smuzhiyun 242*4882a593SmuzhiyunCommon zone and control type attributes 243*4882a593Smuzhiyun--------------------------------------- 244*4882a593Smuzhiyun 245*4882a593Smuzhiyunenabled (rw): Enable/Disable controls at zone level or for all zones using 246*4882a593Smuzhiyuna control type. 247*4882a593Smuzhiyun 248*4882a593SmuzhiyunPower Cap Client Driver Interface 249*4882a593Smuzhiyun================================= 250*4882a593Smuzhiyun 251*4882a593SmuzhiyunThe API summary: 252*4882a593Smuzhiyun 253*4882a593SmuzhiyunCall powercap_register_control_type() to register control type object. 254*4882a593SmuzhiyunCall powercap_register_zone() to register a power zone (under a given 255*4882a593Smuzhiyuncontrol type), either as a top-level power zone or as a subzone of another 256*4882a593Smuzhiyunpower zone registered earlier. 257*4882a593SmuzhiyunThe number of constraints in a power zone and the corresponding callbacks have 258*4882a593Smuzhiyunto be defined prior to calling powercap_register_zone() to register that zone. 259*4882a593Smuzhiyun 260*4882a593SmuzhiyunTo Free a power zone call powercap_unregister_zone(). 261*4882a593SmuzhiyunTo free a control type object call powercap_unregister_control_type(). 262*4882a593SmuzhiyunDetailed API can be generated using kernel-doc on include/linux/powercap.h. 263