1*4882a593SmuzhiyunC Atomic-RMW+mb__after_atomic-is-stronger-than-acquire
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun(*
4*4882a593Smuzhiyun * Result: Never
5*4882a593Smuzhiyun *
6*4882a593Smuzhiyun * Test that an atomic RMW followed by a smp_mb__after_atomic() is
7*4882a593Smuzhiyun * stronger than a normal acquire: both the read and write parts of
8*4882a593Smuzhiyun * the RMW are ordered before the subsequential memory accesses.
9*4882a593Smuzhiyun *)
10*4882a593Smuzhiyun
11*4882a593Smuzhiyun{
12*4882a593Smuzhiyun}
13*4882a593Smuzhiyun
14*4882a593SmuzhiyunP0(int *x, atomic_t *y)
15*4882a593Smuzhiyun{
16*4882a593Smuzhiyun	int r0;
17*4882a593Smuzhiyun	int r1;
18*4882a593Smuzhiyun
19*4882a593Smuzhiyun	r0 = READ_ONCE(*x);
20*4882a593Smuzhiyun	smp_rmb();
21*4882a593Smuzhiyun	r1 = atomic_read(y);
22*4882a593Smuzhiyun}
23*4882a593Smuzhiyun
24*4882a593SmuzhiyunP1(int *x, atomic_t *y)
25*4882a593Smuzhiyun{
26*4882a593Smuzhiyun	atomic_inc(y);
27*4882a593Smuzhiyun	smp_mb__after_atomic();
28*4882a593Smuzhiyun	WRITE_ONCE(*x, 1);
29*4882a593Smuzhiyun}
30*4882a593Smuzhiyun
31*4882a593Smuzhiyunexists
32*4882a593Smuzhiyun(0:r0=1 /\ 0:r1=0)
33