1*4882a593Smuzhiyun================== 2*4882a593SmuzhiyunThe SMBus Protocol 3*4882a593Smuzhiyun================== 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunThe following is a summary of the SMBus protocol. It applies to 6*4882a593Smuzhiyunall revisions of the protocol (1.0, 1.1, and 2.0). 7*4882a593SmuzhiyunCertain protocol features which are not supported by 8*4882a593Smuzhiyunthis package are briefly described at the end of this document. 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunSome adapters understand only the SMBus (System Management Bus) protocol, 11*4882a593Smuzhiyunwhich is a subset from the I2C protocol. Fortunately, many devices use 12*4882a593Smuzhiyunonly the same subset, which makes it possible to put them on an SMBus. 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunIf you write a driver for some I2C device, please try to use the SMBus 15*4882a593Smuzhiyuncommands if at all possible (if the device uses only that subset of the 16*4882a593SmuzhiyunI2C protocol). This makes it possible to use the device driver on both 17*4882a593SmuzhiyunSMBus adapters and I2C adapters (the SMBus command set is automatically 18*4882a593Smuzhiyuntranslated to I2C on I2C adapters, but plain I2C commands can not be 19*4882a593Smuzhiyunhandled at all on most pure SMBus adapters). 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunBelow is a list of SMBus protocol operations, and the functions executing 22*4882a593Smuzhiyunthem. Note that the names used in the SMBus protocol specifications usually 23*4882a593Smuzhiyundon't match these function names. For some of the operations which pass a 24*4882a593Smuzhiyunsingle data byte, the functions using SMBus protocol operation names execute 25*4882a593Smuzhiyuna different protocol operation entirely. 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunEach transaction type corresponds to a functionality flag. Before calling a 28*4882a593Smuzhiyuntransaction function, a device driver should always check (just once) for 29*4882a593Smuzhiyunthe corresponding functionality flag to ensure that the underlying I2C 30*4882a593Smuzhiyunadapter supports the transaction in question. See :doc:`functionality` for 31*4882a593Smuzhiyunthe details. 32*4882a593Smuzhiyun 33*4882a593Smuzhiyun 34*4882a593SmuzhiyunKey to symbols 35*4882a593Smuzhiyun============== 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun=============== ============================================================= 38*4882a593SmuzhiyunS Start condition 39*4882a593SmuzhiyunP Stop condition 40*4882a593SmuzhiyunRd/Wr (1 bit) Read/Write bit. Rd equals 1, Wr equals 0. 41*4882a593SmuzhiyunA, NA (1 bit) Acknowledge (ACK) and Not Acknowledge (NACK) bit 42*4882a593SmuzhiyunAddr (7 bits) I2C 7 bit address. Note that this can be expanded as usual to 43*4882a593Smuzhiyun get a 10 bit I2C address. 44*4882a593SmuzhiyunComm (8 bits) Command byte, a data byte which often selects a register on 45*4882a593Smuzhiyun the device. 46*4882a593SmuzhiyunData (8 bits) A plain data byte. Sometimes, I write DataLow, DataHigh 47*4882a593Smuzhiyun for 16 bit data. 48*4882a593SmuzhiyunCount (8 bits) A data byte containing the length of a block operation. 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun[..] Data sent by I2C device, as opposed to data sent by the host 51*4882a593Smuzhiyun adapter. 52*4882a593Smuzhiyun=============== ============================================================= 53*4882a593Smuzhiyun 54*4882a593Smuzhiyun 55*4882a593SmuzhiyunSMBus Quick Command 56*4882a593Smuzhiyun=================== 57*4882a593Smuzhiyun 58*4882a593SmuzhiyunThis sends a single bit to the device, at the place of the Rd/Wr bit:: 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun S Addr Rd/Wr [A] P 61*4882a593Smuzhiyun 62*4882a593SmuzhiyunFunctionality flag: I2C_FUNC_SMBUS_QUICK 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun 65*4882a593SmuzhiyunSMBus Receive Byte 66*4882a593Smuzhiyun================== 67*4882a593Smuzhiyun 68*4882a593SmuzhiyunImplemented by i2c_smbus_read_byte() 69*4882a593Smuzhiyun 70*4882a593SmuzhiyunThis reads a single byte from a device, without specifying a device 71*4882a593Smuzhiyunregister. Some devices are so simple that this interface is enough; for 72*4882a593Smuzhiyunothers, it is a shorthand if you want to read the same register as in 73*4882a593Smuzhiyunthe previous SMBus command:: 74*4882a593Smuzhiyun 75*4882a593Smuzhiyun S Addr Rd [A] [Data] NA P 76*4882a593Smuzhiyun 77*4882a593SmuzhiyunFunctionality flag: I2C_FUNC_SMBUS_READ_BYTE 78*4882a593Smuzhiyun 79*4882a593Smuzhiyun 80*4882a593SmuzhiyunSMBus Send Byte 81*4882a593Smuzhiyun=============== 82*4882a593Smuzhiyun 83*4882a593SmuzhiyunImplemented by i2c_smbus_write_byte() 84*4882a593Smuzhiyun 85*4882a593SmuzhiyunThis operation is the reverse of Receive Byte: it sends a single byte 86*4882a593Smuzhiyunto a device. See Receive Byte for more information. 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun:: 89*4882a593Smuzhiyun 90*4882a593Smuzhiyun S Addr Wr [A] Data [A] P 91*4882a593Smuzhiyun 92*4882a593SmuzhiyunFunctionality flag: I2C_FUNC_SMBUS_WRITE_BYTE 93*4882a593Smuzhiyun 94*4882a593Smuzhiyun 95*4882a593SmuzhiyunSMBus Read Byte 96*4882a593Smuzhiyun=============== 97*4882a593Smuzhiyun 98*4882a593SmuzhiyunImplemented by i2c_smbus_read_byte_data() 99*4882a593Smuzhiyun 100*4882a593SmuzhiyunThis reads a single byte from a device, from a designated register. 101*4882a593SmuzhiyunThe register is specified through the Comm byte:: 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun S Addr Wr [A] Comm [A] S Addr Rd [A] [Data] NA P 104*4882a593Smuzhiyun 105*4882a593SmuzhiyunFunctionality flag: I2C_FUNC_SMBUS_READ_BYTE_DATA 106*4882a593Smuzhiyun 107*4882a593Smuzhiyun 108*4882a593SmuzhiyunSMBus Read Word 109*4882a593Smuzhiyun=============== 110*4882a593Smuzhiyun 111*4882a593SmuzhiyunImplemented by i2c_smbus_read_word_data() 112*4882a593Smuzhiyun 113*4882a593SmuzhiyunThis operation is very like Read Byte; again, data is read from a 114*4882a593Smuzhiyundevice, from a designated register that is specified through the Comm 115*4882a593Smuzhiyunbyte. But this time, the data is a complete word (16 bits):: 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun S Addr Wr [A] Comm [A] S Addr Rd [A] [DataLow] A [DataHigh] NA P 118*4882a593Smuzhiyun 119*4882a593SmuzhiyunFunctionality flag: I2C_FUNC_SMBUS_READ_WORD_DATA 120*4882a593Smuzhiyun 121*4882a593SmuzhiyunNote the convenience function i2c_smbus_read_word_swapped() is 122*4882a593Smuzhiyunavailable for reads where the two data bytes are the other way 123*4882a593Smuzhiyunaround (not SMBus compliant, but very popular.) 124*4882a593Smuzhiyun 125*4882a593Smuzhiyun 126*4882a593SmuzhiyunSMBus Write Byte 127*4882a593Smuzhiyun================ 128*4882a593Smuzhiyun 129*4882a593SmuzhiyunImplemented by i2c_smbus_write_byte_data() 130*4882a593Smuzhiyun 131*4882a593SmuzhiyunThis writes a single byte to a device, to a designated register. The 132*4882a593Smuzhiyunregister is specified through the Comm byte. This is the opposite of 133*4882a593Smuzhiyunthe Read Byte operation. 134*4882a593Smuzhiyun 135*4882a593Smuzhiyun:: 136*4882a593Smuzhiyun 137*4882a593Smuzhiyun S Addr Wr [A] Comm [A] Data [A] P 138*4882a593Smuzhiyun 139*4882a593SmuzhiyunFunctionality flag: I2C_FUNC_SMBUS_WRITE_BYTE_DATA 140*4882a593Smuzhiyun 141*4882a593Smuzhiyun 142*4882a593SmuzhiyunSMBus Write Word 143*4882a593Smuzhiyun================ 144*4882a593Smuzhiyun 145*4882a593SmuzhiyunImplemented by i2c_smbus_write_word_data() 146*4882a593Smuzhiyun 147*4882a593SmuzhiyunThis is the opposite of the Read Word operation. 16 bits 148*4882a593Smuzhiyunof data are written to a device, to the designated register that is 149*4882a593Smuzhiyunspecified through the Comm byte:: 150*4882a593Smuzhiyun 151*4882a593Smuzhiyun S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] P 152*4882a593Smuzhiyun 153*4882a593SmuzhiyunFunctionality flag: I2C_FUNC_SMBUS_WRITE_WORD_DATA 154*4882a593Smuzhiyun 155*4882a593SmuzhiyunNote the convenience function i2c_smbus_write_word_swapped() is 156*4882a593Smuzhiyunavailable for writes where the two data bytes are the other way 157*4882a593Smuzhiyunaround (not SMBus compliant, but very popular.) 158*4882a593Smuzhiyun 159*4882a593Smuzhiyun 160*4882a593SmuzhiyunSMBus Process Call 161*4882a593Smuzhiyun================== 162*4882a593Smuzhiyun 163*4882a593SmuzhiyunThis command selects a device register (through the Comm byte), sends 164*4882a593Smuzhiyun16 bits of data to it, and reads 16 bits of data in return:: 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun S Addr Wr [A] Comm [A] DataLow [A] DataHigh [A] 167*4882a593Smuzhiyun S Addr Rd [A] [DataLow] A [DataHigh] NA P 168*4882a593Smuzhiyun 169*4882a593SmuzhiyunFunctionality flag: I2C_FUNC_SMBUS_PROC_CALL 170*4882a593Smuzhiyun 171*4882a593Smuzhiyun 172*4882a593SmuzhiyunSMBus Block Read 173*4882a593Smuzhiyun================ 174*4882a593Smuzhiyun 175*4882a593SmuzhiyunImplemented by i2c_smbus_read_block_data() 176*4882a593Smuzhiyun 177*4882a593SmuzhiyunThis command reads a block of up to 32 bytes from a device, from a 178*4882a593Smuzhiyundesignated register that is specified through the Comm byte. The amount 179*4882a593Smuzhiyunof data is specified by the device in the Count byte. 180*4882a593Smuzhiyun 181*4882a593Smuzhiyun:: 182*4882a593Smuzhiyun 183*4882a593Smuzhiyun S Addr Wr [A] Comm [A] 184*4882a593Smuzhiyun S Addr Rd [A] [Count] A [Data] A [Data] A ... A [Data] NA P 185*4882a593Smuzhiyun 186*4882a593SmuzhiyunFunctionality flag: I2C_FUNC_SMBUS_READ_BLOCK_DATA 187*4882a593Smuzhiyun 188*4882a593Smuzhiyun 189*4882a593SmuzhiyunSMBus Block Write 190*4882a593Smuzhiyun================= 191*4882a593Smuzhiyun 192*4882a593SmuzhiyunImplemented by i2c_smbus_write_block_data() 193*4882a593Smuzhiyun 194*4882a593SmuzhiyunThe opposite of the Block Read command, this writes up to 32 bytes to 195*4882a593Smuzhiyuna device, to a designated register that is specified through the 196*4882a593SmuzhiyunComm byte. The amount of data is specified in the Count byte. 197*4882a593Smuzhiyun 198*4882a593Smuzhiyun:: 199*4882a593Smuzhiyun 200*4882a593Smuzhiyun S Addr Wr [A] Comm [A] Count [A] Data [A] Data [A] ... [A] Data [A] P 201*4882a593Smuzhiyun 202*4882a593SmuzhiyunFunctionality flag: I2C_FUNC_SMBUS_WRITE_BLOCK_DATA 203*4882a593Smuzhiyun 204*4882a593Smuzhiyun 205*4882a593SmuzhiyunSMBus Block Write - Block Read Process Call 206*4882a593Smuzhiyun=========================================== 207*4882a593Smuzhiyun 208*4882a593SmuzhiyunSMBus Block Write - Block Read Process Call was introduced in 209*4882a593SmuzhiyunRevision 2.0 of the specification. 210*4882a593Smuzhiyun 211*4882a593SmuzhiyunThis command selects a device register (through the Comm byte), sends 212*4882a593Smuzhiyun1 to 31 bytes of data to it, and reads 1 to 31 bytes of data in return:: 213*4882a593Smuzhiyun 214*4882a593Smuzhiyun S Addr Wr [A] Comm [A] Count [A] Data [A] ... 215*4882a593Smuzhiyun S Addr Rd [A] [Count] A [Data] ... A P 216*4882a593Smuzhiyun 217*4882a593SmuzhiyunFunctionality flag: I2C_FUNC_SMBUS_BLOCK_PROC_CALL 218*4882a593Smuzhiyun 219*4882a593Smuzhiyun 220*4882a593SmuzhiyunSMBus Host Notify 221*4882a593Smuzhiyun================= 222*4882a593Smuzhiyun 223*4882a593SmuzhiyunThis command is sent from a SMBus device acting as a master to the 224*4882a593SmuzhiyunSMBus host acting as a slave. 225*4882a593SmuzhiyunIt is the same form as Write Word, with the command code replaced by the 226*4882a593Smuzhiyunalerting device's address. 227*4882a593Smuzhiyun 228*4882a593Smuzhiyun:: 229*4882a593Smuzhiyun 230*4882a593Smuzhiyun [S] [HostAddr] [Wr] A [DevAddr] A [DataLow] A [DataHigh] A [P] 231*4882a593Smuzhiyun 232*4882a593SmuzhiyunThis is implemented in the following way in the Linux kernel: 233*4882a593Smuzhiyun 234*4882a593Smuzhiyun* I2C bus drivers which support SMBus Host Notify should report 235*4882a593Smuzhiyun I2C_FUNC_SMBUS_HOST_NOTIFY. 236*4882a593Smuzhiyun* I2C bus drivers trigger SMBus Host Notify by a call to 237*4882a593Smuzhiyun i2c_handle_smbus_host_notify(). 238*4882a593Smuzhiyun* I2C drivers for devices which can trigger SMBus Host Notify will have 239*4882a593Smuzhiyun client->irq assigned to a Host Notify IRQ if noone else specified an other. 240*4882a593Smuzhiyun 241*4882a593SmuzhiyunThere is currently no way to retrieve the data parameter from the client. 242*4882a593Smuzhiyun 243*4882a593Smuzhiyun 244*4882a593SmuzhiyunPacket Error Checking (PEC) 245*4882a593Smuzhiyun=========================== 246*4882a593Smuzhiyun 247*4882a593SmuzhiyunPacket Error Checking was introduced in Revision 1.1 of the specification. 248*4882a593Smuzhiyun 249*4882a593SmuzhiyunPEC adds a CRC-8 error-checking byte to transfers using it, immediately 250*4882a593Smuzhiyunbefore the terminating STOP. 251*4882a593Smuzhiyun 252*4882a593Smuzhiyun 253*4882a593SmuzhiyunAddress Resolution Protocol (ARP) 254*4882a593Smuzhiyun================================= 255*4882a593Smuzhiyun 256*4882a593SmuzhiyunThe Address Resolution Protocol was introduced in Revision 2.0 of 257*4882a593Smuzhiyunthe specification. It is a higher-layer protocol which uses the 258*4882a593Smuzhiyunmessages above. 259*4882a593Smuzhiyun 260*4882a593SmuzhiyunARP adds device enumeration and dynamic address assignment to 261*4882a593Smuzhiyunthe protocol. All ARP communications use slave address 0x61 and 262*4882a593Smuzhiyunrequire PEC checksums. 263*4882a593Smuzhiyun 264*4882a593Smuzhiyun 265*4882a593SmuzhiyunSMBus Alert 266*4882a593Smuzhiyun=========== 267*4882a593Smuzhiyun 268*4882a593SmuzhiyunSMBus Alert was introduced in Revision 1.0 of the specification. 269*4882a593Smuzhiyun 270*4882a593SmuzhiyunThe SMBus alert protocol allows several SMBus slave devices to share a 271*4882a593Smuzhiyunsingle interrupt pin on the SMBus master, while still allowing the master 272*4882a593Smuzhiyunto know which slave triggered the interrupt. 273*4882a593Smuzhiyun 274*4882a593SmuzhiyunThis is implemented the following way in the Linux kernel: 275*4882a593Smuzhiyun 276*4882a593Smuzhiyun* I2C bus drivers which support SMBus alert should call 277*4882a593Smuzhiyun i2c_new_smbus_alert_device() to install SMBus alert support. 278*4882a593Smuzhiyun* I2C drivers for devices which can trigger SMBus alerts should implement 279*4882a593Smuzhiyun the optional alert() callback. 280*4882a593Smuzhiyun 281*4882a593Smuzhiyun 282*4882a593SmuzhiyunI2C Block Transactions 283*4882a593Smuzhiyun====================== 284*4882a593Smuzhiyun 285*4882a593SmuzhiyunThe following I2C block transactions are similar to the SMBus Block Read 286*4882a593Smuzhiyunand Write operations, except these do not have a Count byte. They are 287*4882a593Smuzhiyunsupported by the SMBus layer and are described here for completeness, but 288*4882a593Smuzhiyunthey are *NOT* defined by the SMBus specification. 289*4882a593Smuzhiyun 290*4882a593SmuzhiyunI2C block transactions do not limit the number of bytes transferred 291*4882a593Smuzhiyunbut the SMBus layer places a limit of 32 bytes. 292*4882a593Smuzhiyun 293*4882a593Smuzhiyun 294*4882a593SmuzhiyunI2C Block Read 295*4882a593Smuzhiyun============== 296*4882a593Smuzhiyun 297*4882a593SmuzhiyunImplemented by i2c_smbus_read_i2c_block_data() 298*4882a593Smuzhiyun 299*4882a593SmuzhiyunThis command reads a block of bytes from a device, from a 300*4882a593Smuzhiyundesignated register that is specified through the Comm byte:: 301*4882a593Smuzhiyun 302*4882a593Smuzhiyun S Addr Wr [A] Comm [A] 303*4882a593Smuzhiyun S Addr Rd [A] [Data] A [Data] A ... A [Data] NA P 304*4882a593Smuzhiyun 305*4882a593SmuzhiyunFunctionality flag: I2C_FUNC_SMBUS_READ_I2C_BLOCK 306*4882a593Smuzhiyun 307*4882a593Smuzhiyun 308*4882a593SmuzhiyunI2C Block Write 309*4882a593Smuzhiyun=============== 310*4882a593Smuzhiyun 311*4882a593SmuzhiyunImplemented by i2c_smbus_write_i2c_block_data() 312*4882a593Smuzhiyun 313*4882a593SmuzhiyunThe opposite of the Block Read command, this writes bytes to 314*4882a593Smuzhiyuna device, to a designated register that is specified through the 315*4882a593SmuzhiyunComm byte. Note that command lengths of 0, 2, or more bytes are 316*4882a593Smuzhiyunsupported as they are indistinguishable from data. 317*4882a593Smuzhiyun 318*4882a593Smuzhiyun:: 319*4882a593Smuzhiyun 320*4882a593Smuzhiyun S Addr Wr [A] Comm [A] Data [A] Data [A] ... [A] Data [A] P 321*4882a593Smuzhiyun 322*4882a593SmuzhiyunFunctionality flag: I2C_FUNC_SMBUS_WRITE_I2C_BLOCK 323