xref: /OK3568_Linux_fs/kernel/Documentation/gpu/msm-crash-dump.rst (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun:orphan:
2*4882a593Smuzhiyun
3*4882a593Smuzhiyun=====================
4*4882a593SmuzhiyunMSM Crash Dump Format
5*4882a593Smuzhiyun=====================
6*4882a593Smuzhiyun
7*4882a593SmuzhiyunFollowing a GPU hang the MSM driver outputs debugging information via
8*4882a593Smuzhiyun/sys/kernel/dri/X/show or via devcoredump (/sys/class/devcoredump/dcdX/data).
9*4882a593SmuzhiyunThis document describes how the output is formatted.
10*4882a593Smuzhiyun
11*4882a593SmuzhiyunEach entry is in the form key: value. Sections headers will not have a value
12*4882a593Smuzhiyunand all the contents of a section will be indented two spaces from the header.
13*4882a593SmuzhiyunEach section might have multiple array entries the start of which is designated
14*4882a593Smuzhiyunby a (-).
15*4882a593Smuzhiyun
16*4882a593SmuzhiyunMappings
17*4882a593Smuzhiyun--------
18*4882a593Smuzhiyun
19*4882a593Smuzhiyunkernel
20*4882a593Smuzhiyun	The kernel version that generated the dump (UTS_RELEASE).
21*4882a593Smuzhiyun
22*4882a593Smuzhiyunmodule
23*4882a593Smuzhiyun	The module that generated the crashdump.
24*4882a593Smuzhiyun
25*4882a593Smuzhiyuntime
26*4882a593Smuzhiyun	The kernel time at crash formated as seconds.microseconds.
27*4882a593Smuzhiyun
28*4882a593Smuzhiyuncomm
29*4882a593Smuzhiyun	Comm string for the binary that generated the fault.
30*4882a593Smuzhiyun
31*4882a593Smuzhiyuncmdline
32*4882a593Smuzhiyun	Command line for the binary that generated the fault.
33*4882a593Smuzhiyun
34*4882a593Smuzhiyunrevision
35*4882a593Smuzhiyun	ID of the GPU that generated the crash formatted as
36*4882a593Smuzhiyun	core.major.minor.patchlevel separated by dots.
37*4882a593Smuzhiyun
38*4882a593Smuzhiyunrbbm-status
39*4882a593Smuzhiyun	The current value of RBBM_STATUS which shows what top level GPU
40*4882a593Smuzhiyun	components are in use at the time of crash.
41*4882a593Smuzhiyun
42*4882a593Smuzhiyunringbuffer
43*4882a593Smuzhiyun	Section containing the contents of each ringbuffer. Each ringbuffer is
44*4882a593Smuzhiyun	identified with an id number.
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun	id
47*4882a593Smuzhiyun		Ringbuffer ID (0 based index).  Each ringbuffer in the section
48*4882a593Smuzhiyun		will have its own unique id.
49*4882a593Smuzhiyun	iova
50*4882a593Smuzhiyun		GPU address of the ringbuffer.
51*4882a593Smuzhiyun
52*4882a593Smuzhiyun	last-fence
53*4882a593Smuzhiyun		The last fence that was issued on the ringbuffer
54*4882a593Smuzhiyun
55*4882a593Smuzhiyun	retired-fence
56*4882a593Smuzhiyun		The last fence retired on the ringbuffer.
57*4882a593Smuzhiyun
58*4882a593Smuzhiyun	rptr
59*4882a593Smuzhiyun		The current read pointer (rptr) for the ringbuffer.
60*4882a593Smuzhiyun
61*4882a593Smuzhiyun	wptr
62*4882a593Smuzhiyun		The current write pointer (wptr) for the ringbuffer.
63*4882a593Smuzhiyun
64*4882a593Smuzhiyun	size
65*4882a593Smuzhiyun		Maximum size of the ringbuffer programmed in the hardware.
66*4882a593Smuzhiyun
67*4882a593Smuzhiyun	data
68*4882a593Smuzhiyun		The contents of the ring encoded as ascii85.  Only the used
69*4882a593Smuzhiyun		portions of the ring will be printed.
70*4882a593Smuzhiyun
71*4882a593Smuzhiyunbo
72*4882a593Smuzhiyun	List of buffers from the hanging submission if available.
73*4882a593Smuzhiyun	Each buffer object will have a uinque iova.
74*4882a593Smuzhiyun
75*4882a593Smuzhiyun	iova
76*4882a593Smuzhiyun		GPU address of the buffer object.
77*4882a593Smuzhiyun
78*4882a593Smuzhiyun	size
79*4882a593Smuzhiyun		Allocated size of the buffer object.
80*4882a593Smuzhiyun
81*4882a593Smuzhiyun	data
82*4882a593Smuzhiyun		The contents of the buffer object encoded with ascii85.  Only
83*4882a593Smuzhiyun		Trailing zeros at the end of the buffer will be skipped.
84*4882a593Smuzhiyun
85*4882a593Smuzhiyunregisters
86*4882a593Smuzhiyun	Set of registers values. Each entry is on its own line enclosed
87*4882a593Smuzhiyun	by brackets { }.
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun	offset
90*4882a593Smuzhiyun		Byte offset of the register from the start of the
91*4882a593Smuzhiyun		GPU memory region.
92*4882a593Smuzhiyun
93*4882a593Smuzhiyun	value
94*4882a593Smuzhiyun		Hexadecimal value of the register.
95*4882a593Smuzhiyun
96*4882a593Smuzhiyunregisters-hlsq
97*4882a593Smuzhiyun		(5xx only) Register values from the HLSQ aperture.
98*4882a593Smuzhiyun		Same format as the register section.
99