xref: /OK3568_Linux_fs/kernel/Documentation/driver-api/rapidio/tsi721.rst (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun=========================================================================
2*4882a593SmuzhiyunRapidIO subsystem mport driver for IDT Tsi721 PCI Express-to-SRIO bridge.
3*4882a593Smuzhiyun=========================================================================
4*4882a593Smuzhiyun
5*4882a593Smuzhiyun1. Overview
6*4882a593Smuzhiyun===========
7*4882a593Smuzhiyun
8*4882a593SmuzhiyunThis driver implements all currently defined RapidIO mport callback functions.
9*4882a593SmuzhiyunIt supports maintenance read and write operations, inbound and outbound RapidIO
10*4882a593Smuzhiyundoorbells, inbound maintenance port-writes and RapidIO messaging.
11*4882a593Smuzhiyun
12*4882a593SmuzhiyunTo generate SRIO maintenance transactions this driver uses one of Tsi721 DMA
13*4882a593Smuzhiyunchannels. This mechanism provides access to larger range of hop counts and
14*4882a593Smuzhiyundestination IDs without need for changes in outbound window translation.
15*4882a593Smuzhiyun
16*4882a593SmuzhiyunRapidIO messaging support uses dedicated messaging channels for each mailbox.
17*4882a593SmuzhiyunFor inbound messages this driver uses destination ID matching to forward messages
18*4882a593Smuzhiyuninto the corresponding message queue. Messaging callbacks are implemented to be
19*4882a593Smuzhiyunfully compatible with RIONET driver (Ethernet over RapidIO messaging services).
20*4882a593Smuzhiyun
21*4882a593Smuzhiyun1. Module parameters:
22*4882a593Smuzhiyun
23*4882a593Smuzhiyun- 'dbg_level'
24*4882a593Smuzhiyun      - This parameter allows to control amount of debug information
25*4882a593Smuzhiyun        generated by this device driver. This parameter is formed by set of
26*4882a593Smuzhiyun        This parameter can be changed bit masks that correspond to the specific
27*4882a593Smuzhiyun        functional block.
28*4882a593Smuzhiyun        For mask definitions see 'drivers/rapidio/devices/tsi721.h'
29*4882a593Smuzhiyun        This parameter can be changed dynamically.
30*4882a593Smuzhiyun        Use CONFIG_RAPIDIO_DEBUG=y to enable debug output at the top level.
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun- 'dma_desc_per_channel'
33*4882a593Smuzhiyun      - This parameter defines number of hardware buffer
34*4882a593Smuzhiyun        descriptors allocated for each registered Tsi721 DMA channel.
35*4882a593Smuzhiyun        Its default value is 128.
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun- 'dma_txqueue_sz'
38*4882a593Smuzhiyun      - DMA transactions queue size. Defines number of pending
39*4882a593Smuzhiyun        transaction requests that can be accepted by each DMA channel.
40*4882a593Smuzhiyun        Default value is 16.
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun- 'dma_sel'
43*4882a593Smuzhiyun      - DMA channel selection mask. Bitmask that defines which hardware
44*4882a593Smuzhiyun        DMA channels (0 ... 6) will be registered with DmaEngine core.
45*4882a593Smuzhiyun        If bit is set to 1, the corresponding DMA channel will be registered.
46*4882a593Smuzhiyun        DMA channels not selected by this mask will not be used by this device
47*4882a593Smuzhiyun        driver. Default value is 0x7f (use all channels).
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun- 'pcie_mrrs'
50*4882a593Smuzhiyun      - override value for PCIe Maximum Read Request Size (MRRS).
51*4882a593Smuzhiyun        This parameter gives an ability to override MRRS value set during PCIe
52*4882a593Smuzhiyun        configuration process. Tsi721 supports read request sizes up to 4096B.
53*4882a593Smuzhiyun        Value for this parameter must be set as defined by PCIe specification:
54*4882a593Smuzhiyun        0 = 128B, 1 = 256B, 2 = 512B, 3 = 1024B, 4 = 2048B and 5 = 4096B.
55*4882a593Smuzhiyun        Default value is '-1' (= keep platform setting).
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun- 'mbox_sel'
58*4882a593Smuzhiyun      - RIO messaging MBOX selection mask. This is a bitmask that defines
59*4882a593Smuzhiyun        messaging MBOXes are managed by this device driver. Mask bits 0 - 3
60*4882a593Smuzhiyun        correspond to MBOX0 - MBOX3. MBOX is under driver's control if the
61*4882a593Smuzhiyun        corresponding bit is set to '1'. Default value is 0x0f (= all).
62*4882a593Smuzhiyun
63*4882a593Smuzhiyun2. Known problems
64*4882a593Smuzhiyun=================
65*4882a593Smuzhiyun
66*4882a593Smuzhiyun  None.
67*4882a593Smuzhiyun
68*4882a593Smuzhiyun3. DMA Engine Support
69*4882a593Smuzhiyun=====================
70*4882a593Smuzhiyun
71*4882a593SmuzhiyunTsi721 mport driver supports DMA data transfers between local system memory and
72*4882a593Smuzhiyunremote RapidIO devices. This functionality is implemented according to SLAVE
73*4882a593Smuzhiyunmode API defined by common Linux kernel DMA Engine framework.
74*4882a593Smuzhiyun
75*4882a593SmuzhiyunDepending on system requirements RapidIO DMA operations can be included/excluded
76*4882a593Smuzhiyunby setting CONFIG_RAPIDIO_DMA_ENGINE option. Tsi721 miniport driver uses seven
77*4882a593Smuzhiyunout of eight available BDMA channels to support DMA data transfers.
78*4882a593SmuzhiyunOne BDMA channel is reserved for generation of maintenance read/write requests.
79*4882a593Smuzhiyun
80*4882a593SmuzhiyunIf Tsi721 mport driver have been built with RAPIDIO_DMA_ENGINE support included,
81*4882a593Smuzhiyunthis driver will accept DMA-specific module parameter:
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun  "dma_desc_per_channel"
84*4882a593Smuzhiyun			 - defines number of hardware buffer descriptors used by
85*4882a593Smuzhiyun                           each BDMA channel of Tsi721 (by default - 128).
86*4882a593Smuzhiyun
87*4882a593Smuzhiyun4. Version History
88*4882a593Smuzhiyun
89*4882a593Smuzhiyun  =====   ====================================================================
90*4882a593Smuzhiyun  1.1.0   DMA operations re-worked to support data scatter/gather lists larger
91*4882a593Smuzhiyun          than hardware buffer descriptors ring.
92*4882a593Smuzhiyun  1.0.0   Initial driver release.
93*4882a593Smuzhiyun  =====   ====================================================================
94*4882a593Smuzhiyun
95*4882a593Smuzhiyun5.  License
96*4882a593Smuzhiyun===========
97*4882a593Smuzhiyun
98*4882a593Smuzhiyun  Copyright(c) 2011 Integrated Device Technology, Inc. All rights reserved.
99*4882a593Smuzhiyun
100*4882a593Smuzhiyun  This program is free software; you can redistribute it and/or modify it
101*4882a593Smuzhiyun  under the terms of the GNU General Public License as published by the Free
102*4882a593Smuzhiyun  Software Foundation; either version 2 of the License, or (at your option)
103*4882a593Smuzhiyun  any later version.
104*4882a593Smuzhiyun
105*4882a593Smuzhiyun  This program is distributed in the hope that it will be useful, but WITHOUT
106*4882a593Smuzhiyun  ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
107*4882a593Smuzhiyun  FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
108*4882a593Smuzhiyun  more details.
109*4882a593Smuzhiyun
110*4882a593Smuzhiyun  You should have received a copy of the GNU General Public License along with
111*4882a593Smuzhiyun  this program; if not, write to the Free Software Foundation, Inc.,
112*4882a593Smuzhiyun  59 Temple Place - Suite 330, Boston, MA  02111-1307, USA.
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