1*4882a593Smuzhiyun.. SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThe cpia2 driver 4*4882a593Smuzhiyun================ 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunAuthors: Peter Pregler <Peter_Pregler@email.com>, 7*4882a593SmuzhiyunScott J. Bertin <scottbertin@yahoo.com>, and 8*4882a593SmuzhiyunJarl Totland <Jarl.Totland@bdc.no> for the original cpia driver, which 9*4882a593Smuzhiyunthis one was modelled from. 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunNotes to developers 13*4882a593Smuzhiyun~~~~~~~~~~~~~~~~~~~ 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun - This is a driver version stripped of the 2.4 back compatibility 16*4882a593Smuzhiyun and old MJPEG ioctl API. See cpia2.sf.net for 2.4 support. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunProgrammer's overview of cpia2 driver 19*4882a593Smuzhiyun~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunCpia2 is the second generation video coprocessor from VLSI Vision Ltd (now a 22*4882a593Smuzhiyundivision of ST Microelectronics). There are two versions. The first is the 23*4882a593SmuzhiyunSTV0672, which is capable of up to 30 frames per second (fps) in frame sizes 24*4882a593Smuzhiyunup to CIF, and 15 fps for VGA frames. The STV0676 is an improved version, 25*4882a593Smuzhiyunwhich can handle up to 30 fps VGA. Both coprocessors can be attached to two 26*4882a593SmuzhiyunCMOS sensors - the vvl6410 CIF sensor and the vvl6500 VGA sensor. These will 27*4882a593Smuzhiyunbe referred to as the 410 and the 500 sensors, or the CIF and VGA sensors. 28*4882a593Smuzhiyun 29*4882a593SmuzhiyunThe two chipsets operate almost identically. The core is an 8051 processor, 30*4882a593Smuzhiyunrunning two different versions of firmware. The 672 runs the VP4 video 31*4882a593Smuzhiyunprocessor code, the 676 runs VP5. There are a few differences in register 32*4882a593Smuzhiyunmappings for the two chips. In these cases, the symbols defined in the 33*4882a593Smuzhiyunheader files are marked with VP4 or VP5 as part of the symbol name. 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunThe cameras appear externally as three sets of registers. Setting register 36*4882a593Smuzhiyunvalues is the only way to control the camera. Some settings are 37*4882a593Smuzhiyuninterdependant, such as the sequence required to power up the camera. I will 38*4882a593Smuzhiyuntry to make note of all of these cases. 39*4882a593Smuzhiyun 40*4882a593SmuzhiyunThe register sets are called blocks. Block 0 is the system block. This 41*4882a593Smuzhiyunsection is always powered on when the camera is plugged in. It contains 42*4882a593Smuzhiyunregisters that control housekeeping functions such as powering up the video 43*4882a593Smuzhiyunprocessor. The video processor is the VP block. These registers control 44*4882a593Smuzhiyunhow the video from the sensor is processed. Examples are timing registers, 45*4882a593Smuzhiyunuser mode (vga, qvga), scaling, cropping, framerates, and so on. The last 46*4882a593Smuzhiyunblock is the video compressor (VC). The video stream sent from the camera is 47*4882a593Smuzhiyuncompressed as Motion JPEG (JPEGA). The VC controls all of the compression 48*4882a593Smuzhiyunparameters. Looking at the file cpia2_registers.h, you can get a full view 49*4882a593Smuzhiyunof these registers and the possible values for most of them. 50*4882a593Smuzhiyun 51*4882a593SmuzhiyunOne or more registers can be set or read by sending a usb control message to 52*4882a593Smuzhiyunthe camera. There are three modes for this. Block mode requests a number 53*4882a593Smuzhiyunof contiguous registers. Random mode reads or writes random registers with 54*4882a593Smuzhiyuna tuple structure containing address/value pairs. The repeat mode is only 55*4882a593Smuzhiyunused by VP4 to load a firmware patch. It contains a starting address and 56*4882a593Smuzhiyuna sequence of bytes to be written into a gpio port. 57