xref: /OK3568_Linux_fs/kernel/Documentation/driver-api/gpio/legacy.rst (revision 4882a59341e53eb6f0b4789bf948001014eff981)
1*4882a593Smuzhiyun======================
2*4882a593SmuzhiyunLegacy GPIO Interfaces
3*4882a593Smuzhiyun======================
4*4882a593Smuzhiyun
5*4882a593SmuzhiyunThis provides an overview of GPIO access conventions on Linux.
6*4882a593Smuzhiyun
7*4882a593SmuzhiyunThese calls use the gpio_* naming prefix.  No other calls should use that
8*4882a593Smuzhiyunprefix, or the related __gpio_* prefix.
9*4882a593Smuzhiyun
10*4882a593Smuzhiyun
11*4882a593SmuzhiyunWhat is a GPIO?
12*4882a593Smuzhiyun===============
13*4882a593SmuzhiyunA "General Purpose Input/Output" (GPIO) is a flexible software-controlled
14*4882a593Smuzhiyundigital signal.  They are provided from many kinds of chip, and are familiar
15*4882a593Smuzhiyunto Linux developers working with embedded and custom hardware.  Each GPIO
16*4882a593Smuzhiyunrepresents a bit connected to a particular pin, or "ball" on Ball Grid Array
17*4882a593Smuzhiyun(BGA) packages.  Board schematics show which external hardware connects to
18*4882a593Smuzhiyunwhich GPIOs.  Drivers can be written generically, so that board setup code
19*4882a593Smuzhiyunpasses such pin configuration data to drivers.
20*4882a593Smuzhiyun
21*4882a593SmuzhiyunSystem-on-Chip (SOC) processors heavily rely on GPIOs.  In some cases, every
22*4882a593Smuzhiyunnon-dedicated pin can be configured as a GPIO; and most chips have at least
23*4882a593Smuzhiyunseveral dozen of them.  Programmable logic devices (like FPGAs) can easily
24*4882a593Smuzhiyunprovide GPIOs; multifunction chips like power managers, and audio codecs
25*4882a593Smuzhiyunoften have a few such pins to help with pin scarcity on SOCs; and there are
26*4882a593Smuzhiyunalso "GPIO Expander" chips that connect using the I2C or SPI serial busses.
27*4882a593SmuzhiyunMost PC southbridges have a few dozen GPIO-capable pins (with only the BIOS
28*4882a593Smuzhiyunfirmware knowing how they're used).
29*4882a593Smuzhiyun
30*4882a593SmuzhiyunThe exact capabilities of GPIOs vary between systems.  Common options:
31*4882a593Smuzhiyun
32*4882a593Smuzhiyun  - Output values are writable (high=1, low=0).  Some chips also have
33*4882a593Smuzhiyun    options about how that value is driven, so that for example only one
34*4882a593Smuzhiyun    value might be driven ... supporting "wire-OR" and similar schemes
35*4882a593Smuzhiyun    for the other value (notably, "open drain" signaling).
36*4882a593Smuzhiyun
37*4882a593Smuzhiyun  - Input values are likewise readable (1, 0).  Some chips support readback
38*4882a593Smuzhiyun    of pins configured as "output", which is very useful in such "wire-OR"
39*4882a593Smuzhiyun    cases (to support bidirectional signaling).  GPIO controllers may have
40*4882a593Smuzhiyun    input de-glitch/debounce logic, sometimes with software controls.
41*4882a593Smuzhiyun
42*4882a593Smuzhiyun  - Inputs can often be used as IRQ signals, often edge triggered but
43*4882a593Smuzhiyun    sometimes level triggered.  Such IRQs may be configurable as system
44*4882a593Smuzhiyun    wakeup events, to wake the system from a low power state.
45*4882a593Smuzhiyun
46*4882a593Smuzhiyun  - Usually a GPIO will be configurable as either input or output, as needed
47*4882a593Smuzhiyun    by different product boards; single direction ones exist too.
48*4882a593Smuzhiyun
49*4882a593Smuzhiyun  - Most GPIOs can be accessed while holding spinlocks, but those accessed
50*4882a593Smuzhiyun    through a serial bus normally can't.  Some systems support both types.
51*4882a593Smuzhiyun
52*4882a593SmuzhiyunOn a given board each GPIO is used for one specific purpose like monitoring
53*4882a593SmuzhiyunMMC/SD card insertion/removal, detecting card writeprotect status, driving
54*4882a593Smuzhiyuna LED, configuring a transceiver, bitbanging a serial bus, poking a hardware
55*4882a593Smuzhiyunwatchdog, sensing a switch, and so on.
56*4882a593Smuzhiyun
57*4882a593Smuzhiyun
58*4882a593SmuzhiyunGPIO conventions
59*4882a593Smuzhiyun================
60*4882a593SmuzhiyunNote that this is called a "convention" because you don't need to do it this
61*4882a593Smuzhiyunway, and it's no crime if you don't.  There **are** cases where portability
62*4882a593Smuzhiyunis not the main issue; GPIOs are often used for the kind of board-specific
63*4882a593Smuzhiyunglue logic that may even change between board revisions, and can't ever be
64*4882a593Smuzhiyunused on a board that's wired differently.  Only least-common-denominator
65*4882a593Smuzhiyunfunctionality can be very portable.  Other features are platform-specific,
66*4882a593Smuzhiyunand that can be critical for glue logic.
67*4882a593Smuzhiyun
68*4882a593SmuzhiyunPlus, this doesn't require any implementation framework, just an interface.
69*4882a593SmuzhiyunOne platform might implement it as simple inline functions accessing chip
70*4882a593Smuzhiyunregisters; another might implement it by delegating through abstractions
71*4882a593Smuzhiyunused for several very different kinds of GPIO controller.  (There is some
72*4882a593Smuzhiyunoptional code supporting such an implementation strategy, described later
73*4882a593Smuzhiyunin this document, but drivers acting as clients to the GPIO interface must
74*4882a593Smuzhiyunnot care how it's implemented.)
75*4882a593Smuzhiyun
76*4882a593SmuzhiyunThat said, if the convention is supported on their platform, drivers should
77*4882a593Smuzhiyunuse it when possible.  Platforms must select GPIOLIB if GPIO functionality
78*4882a593Smuzhiyunis strictly required.  Drivers that can't work without
79*4882a593Smuzhiyunstandard GPIO calls should have Kconfig entries which depend on GPIOLIB.  The
80*4882a593SmuzhiyunGPIO calls are available, either as "real code" or as optimized-away stubs,
81*4882a593Smuzhiyunwhen drivers use the include file:
82*4882a593Smuzhiyun
83*4882a593Smuzhiyun	#include <linux/gpio.h>
84*4882a593Smuzhiyun
85*4882a593SmuzhiyunIf you stick to this convention then it'll be easier for other developers to
86*4882a593Smuzhiyunsee what your code is doing, and help maintain it.
87*4882a593Smuzhiyun
88*4882a593SmuzhiyunNote that these operations include I/O barriers on platforms which need to
89*4882a593Smuzhiyunuse them; drivers don't need to add them explicitly.
90*4882a593Smuzhiyun
91*4882a593Smuzhiyun
92*4882a593SmuzhiyunIdentifying GPIOs
93*4882a593Smuzhiyun-----------------
94*4882a593SmuzhiyunGPIOs are identified by unsigned integers in the range 0..MAX_INT.  That
95*4882a593Smuzhiyunreserves "negative" numbers for other purposes like marking signals as
96*4882a593Smuzhiyun"not available on this board", or indicating faults.  Code that doesn't
97*4882a593Smuzhiyuntouch the underlying hardware treats these integers as opaque cookies.
98*4882a593Smuzhiyun
99*4882a593SmuzhiyunPlatforms define how they use those integers, and usually #define symbols
100*4882a593Smuzhiyunfor the GPIO lines so that board-specific setup code directly corresponds
101*4882a593Smuzhiyunto the relevant schematics.  In contrast, drivers should only use GPIO
102*4882a593Smuzhiyunnumbers passed to them from that setup code, using platform_data to hold
103*4882a593Smuzhiyunboard-specific pin configuration data (along with other board specific
104*4882a593Smuzhiyundata they need).  That avoids portability problems.
105*4882a593Smuzhiyun
106*4882a593SmuzhiyunSo for example one platform uses numbers 32-159 for GPIOs; while another
107*4882a593Smuzhiyunuses numbers 0..63 with one set of GPIO controllers, 64-79 with another
108*4882a593Smuzhiyuntype of GPIO controller, and on one particular board 80-95 with an FPGA.
109*4882a593SmuzhiyunThe numbers need not be contiguous; either of those platforms could also
110*4882a593Smuzhiyunuse numbers 2000-2063 to identify GPIOs in a bank of I2C GPIO expanders.
111*4882a593Smuzhiyun
112*4882a593SmuzhiyunIf you want to initialize a structure with an invalid GPIO number, use
113*4882a593Smuzhiyunsome negative number (perhaps "-EINVAL"); that will never be valid.  To
114*4882a593Smuzhiyuntest if such number from such a structure could reference a GPIO, you
115*4882a593Smuzhiyunmay use this predicate:
116*4882a593Smuzhiyun
117*4882a593Smuzhiyun	int gpio_is_valid(int number);
118*4882a593Smuzhiyun
119*4882a593SmuzhiyunA number that's not valid will be rejected by calls which may request
120*4882a593Smuzhiyunor free GPIOs (see below).  Other numbers may also be rejected; for
121*4882a593Smuzhiyunexample, a number might be valid but temporarily unused on a given board.
122*4882a593Smuzhiyun
123*4882a593SmuzhiyunWhether a platform supports multiple GPIO controllers is a platform-specific
124*4882a593Smuzhiyunimplementation issue, as are whether that support can leave "holes" in the space
125*4882a593Smuzhiyunof GPIO numbers, and whether new controllers can be added at runtime.  Such issues
126*4882a593Smuzhiyuncan affect things including whether adjacent GPIO numbers are both valid.
127*4882a593Smuzhiyun
128*4882a593SmuzhiyunUsing GPIOs
129*4882a593Smuzhiyun-----------
130*4882a593SmuzhiyunThe first thing a system should do with a GPIO is allocate it, using
131*4882a593Smuzhiyunthe gpio_request() call; see later.
132*4882a593Smuzhiyun
133*4882a593SmuzhiyunOne of the next things to do with a GPIO, often in board setup code when
134*4882a593Smuzhiyunsetting up a platform_device using the GPIO, is mark its direction::
135*4882a593Smuzhiyun
136*4882a593Smuzhiyun	/* set as input or output, returning 0 or negative errno */
137*4882a593Smuzhiyun	int gpio_direction_input(unsigned gpio);
138*4882a593Smuzhiyun	int gpio_direction_output(unsigned gpio, int value);
139*4882a593Smuzhiyun
140*4882a593SmuzhiyunThe return value is zero for success, else a negative errno.  It should
141*4882a593Smuzhiyunbe checked, since the get/set calls don't have error returns and since
142*4882a593Smuzhiyunmisconfiguration is possible.  You should normally issue these calls from
143*4882a593Smuzhiyuna task context.  However, for spinlock-safe GPIOs it's OK to use them
144*4882a593Smuzhiyunbefore tasking is enabled, as part of early board setup.
145*4882a593Smuzhiyun
146*4882a593SmuzhiyunFor output GPIOs, the value provided becomes the initial output value.
147*4882a593SmuzhiyunThis helps avoid signal glitching during system startup.
148*4882a593Smuzhiyun
149*4882a593SmuzhiyunFor compatibility with legacy interfaces to GPIOs, setting the direction
150*4882a593Smuzhiyunof a GPIO implicitly requests that GPIO (see below) if it has not been
151*4882a593Smuzhiyunrequested already.  That compatibility is being removed from the optional
152*4882a593Smuzhiyungpiolib framework.
153*4882a593Smuzhiyun
154*4882a593SmuzhiyunSetting the direction can fail if the GPIO number is invalid, or when
155*4882a593Smuzhiyunthat particular GPIO can't be used in that mode.  It's generally a bad
156*4882a593Smuzhiyunidea to rely on boot firmware to have set the direction correctly, since
157*4882a593Smuzhiyunit probably wasn't validated to do more than boot Linux.  (Similarly,
158*4882a593Smuzhiyunthat board setup code probably needs to multiplex that pin as a GPIO,
159*4882a593Smuzhiyunand configure pullups/pulldowns appropriately.)
160*4882a593Smuzhiyun
161*4882a593Smuzhiyun
162*4882a593SmuzhiyunSpinlock-Safe GPIO access
163*4882a593Smuzhiyun-------------------------
164*4882a593SmuzhiyunMost GPIO controllers can be accessed with memory read/write instructions.
165*4882a593SmuzhiyunThose don't need to sleep, and can safely be done from inside hard
166*4882a593Smuzhiyun(nonthreaded) IRQ handlers and similar contexts.
167*4882a593Smuzhiyun
168*4882a593SmuzhiyunUse the following calls to access such GPIOs,
169*4882a593Smuzhiyunfor which gpio_cansleep() will always return false (see below)::
170*4882a593Smuzhiyun
171*4882a593Smuzhiyun	/* GPIO INPUT:  return zero or nonzero */
172*4882a593Smuzhiyun	int gpio_get_value(unsigned gpio);
173*4882a593Smuzhiyun
174*4882a593Smuzhiyun	/* GPIO OUTPUT */
175*4882a593Smuzhiyun	void gpio_set_value(unsigned gpio, int value);
176*4882a593Smuzhiyun
177*4882a593SmuzhiyunThe values are boolean, zero for low, nonzero for high.  When reading the
178*4882a593Smuzhiyunvalue of an output pin, the value returned should be what's seen on the
179*4882a593Smuzhiyunpin ... that won't always match the specified output value, because of
180*4882a593Smuzhiyunissues including open-drain signaling and output latencies.
181*4882a593Smuzhiyun
182*4882a593SmuzhiyunThe get/set calls have no error returns because "invalid GPIO" should have
183*4882a593Smuzhiyunbeen reported earlier from gpio_direction_*().  However, note that not all
184*4882a593Smuzhiyunplatforms can read the value of output pins; those that can't should always
185*4882a593Smuzhiyunreturn zero.  Also, using these calls for GPIOs that can't safely be accessed
186*4882a593Smuzhiyunwithout sleeping (see below) is an error.
187*4882a593Smuzhiyun
188*4882a593SmuzhiyunPlatform-specific implementations are encouraged to optimize the two
189*4882a593Smuzhiyuncalls to access the GPIO value in cases where the GPIO number (and for
190*4882a593Smuzhiyunoutput, value) are constant.  It's normal for them to need only a couple
191*4882a593Smuzhiyunof instructions in such cases (reading or writing a hardware register),
192*4882a593Smuzhiyunand not to need spinlocks.  Such optimized calls can make bitbanging
193*4882a593Smuzhiyunapplications a lot more efficient (in both space and time) than spending
194*4882a593Smuzhiyundozens of instructions on subroutine calls.
195*4882a593Smuzhiyun
196*4882a593Smuzhiyun
197*4882a593SmuzhiyunGPIO access that may sleep
198*4882a593Smuzhiyun--------------------------
199*4882a593SmuzhiyunSome GPIO controllers must be accessed using message based busses like I2C
200*4882a593Smuzhiyunor SPI.  Commands to read or write those GPIO values require waiting to
201*4882a593Smuzhiyunget to the head of a queue to transmit a command and get its response.
202*4882a593SmuzhiyunThis requires sleeping, which can't be done from inside IRQ handlers.
203*4882a593Smuzhiyun
204*4882a593SmuzhiyunPlatforms that support this type of GPIO distinguish them from other GPIOs
205*4882a593Smuzhiyunby returning nonzero from this call (which requires a valid GPIO number,
206*4882a593Smuzhiyunwhich should have been previously allocated with gpio_request)::
207*4882a593Smuzhiyun
208*4882a593Smuzhiyun	int gpio_cansleep(unsigned gpio);
209*4882a593Smuzhiyun
210*4882a593SmuzhiyunTo access such GPIOs, a different set of accessors is defined::
211*4882a593Smuzhiyun
212*4882a593Smuzhiyun	/* GPIO INPUT:  return zero or nonzero, might sleep */
213*4882a593Smuzhiyun	int gpio_get_value_cansleep(unsigned gpio);
214*4882a593Smuzhiyun
215*4882a593Smuzhiyun	/* GPIO OUTPUT, might sleep */
216*4882a593Smuzhiyun	void gpio_set_value_cansleep(unsigned gpio, int value);
217*4882a593Smuzhiyun
218*4882a593Smuzhiyun
219*4882a593SmuzhiyunAccessing such GPIOs requires a context which may sleep,  for example
220*4882a593Smuzhiyuna threaded IRQ handler, and those accessors must be used instead of
221*4882a593Smuzhiyunspinlock-safe accessors without the cansleep() name suffix.
222*4882a593Smuzhiyun
223*4882a593SmuzhiyunOther than the fact that these accessors might sleep, and will work
224*4882a593Smuzhiyunon GPIOs that can't be accessed from hardIRQ handlers, these calls act
225*4882a593Smuzhiyunthe same as the spinlock-safe calls.
226*4882a593Smuzhiyun
227*4882a593Smuzhiyun**IN ADDITION** calls to setup and configure such GPIOs must be made
228*4882a593Smuzhiyunfrom contexts which may sleep, since they may need to access the GPIO
229*4882a593Smuzhiyuncontroller chip too  (These setup calls are usually made from board
230*4882a593Smuzhiyunsetup or driver probe/teardown code, so this is an easy constraint.)::
231*4882a593Smuzhiyun
232*4882a593Smuzhiyun                gpio_direction_input()
233*4882a593Smuzhiyun                gpio_direction_output()
234*4882a593Smuzhiyun                gpio_request()
235*4882a593Smuzhiyun
236*4882a593Smuzhiyun        ## 	gpio_request_one()
237*4882a593Smuzhiyun        ##	gpio_request_array()
238*4882a593Smuzhiyun        ## 	gpio_free_array()
239*4882a593Smuzhiyun
240*4882a593Smuzhiyun                gpio_free()
241*4882a593Smuzhiyun                gpio_set_debounce()
242*4882a593Smuzhiyun
243*4882a593Smuzhiyun
244*4882a593Smuzhiyun
245*4882a593SmuzhiyunClaiming and Releasing GPIOs
246*4882a593Smuzhiyun----------------------------
247*4882a593SmuzhiyunTo help catch system configuration errors, two calls are defined::
248*4882a593Smuzhiyun
249*4882a593Smuzhiyun	/* request GPIO, returning 0 or negative errno.
250*4882a593Smuzhiyun	 * non-null labels may be useful for diagnostics.
251*4882a593Smuzhiyun	 */
252*4882a593Smuzhiyun	int gpio_request(unsigned gpio, const char *label);
253*4882a593Smuzhiyun
254*4882a593Smuzhiyun	/* release previously-claimed GPIO */
255*4882a593Smuzhiyun	void gpio_free(unsigned gpio);
256*4882a593Smuzhiyun
257*4882a593SmuzhiyunPassing invalid GPIO numbers to gpio_request() will fail, as will requesting
258*4882a593SmuzhiyunGPIOs that have already been claimed with that call.  The return value of
259*4882a593Smuzhiyungpio_request() must be checked.  You should normally issue these calls from
260*4882a593Smuzhiyuna task context.  However, for spinlock-safe GPIOs it's OK to request GPIOs
261*4882a593Smuzhiyunbefore tasking is enabled, as part of early board setup.
262*4882a593Smuzhiyun
263*4882a593SmuzhiyunThese calls serve two basic purposes.  One is marking the signals which
264*4882a593Smuzhiyunare actually in use as GPIOs, for better diagnostics; systems may have
265*4882a593Smuzhiyunseveral hundred potential GPIOs, but often only a dozen are used on any
266*4882a593Smuzhiyungiven board.  Another is to catch conflicts, identifying errors when
267*4882a593Smuzhiyun(a) two or more drivers wrongly think they have exclusive use of that
268*4882a593Smuzhiyunsignal, or (b) something wrongly believes it's safe to remove drivers
269*4882a593Smuzhiyunneeded to manage a signal that's in active use.  That is, requesting a
270*4882a593SmuzhiyunGPIO can serve as a kind of lock.
271*4882a593Smuzhiyun
272*4882a593SmuzhiyunSome platforms may also use knowledge about what GPIOs are active for
273*4882a593Smuzhiyunpower management, such as by powering down unused chip sectors and, more
274*4882a593Smuzhiyuneasily, gating off unused clocks.
275*4882a593Smuzhiyun
276*4882a593SmuzhiyunFor GPIOs that use pins known to the pinctrl subsystem, that subsystem should
277*4882a593Smuzhiyunbe informed of their use; a gpiolib driver's .request() operation may call
278*4882a593Smuzhiyunpinctrl_gpio_request(), and a gpiolib driver's .free() operation may call
279*4882a593Smuzhiyunpinctrl_gpio_free(). The pinctrl subsystem allows a pinctrl_gpio_request()
280*4882a593Smuzhiyunto succeed concurrently with a pin or pingroup being "owned" by a device for
281*4882a593Smuzhiyunpin multiplexing.
282*4882a593Smuzhiyun
283*4882a593SmuzhiyunAny programming of pin multiplexing hardware that is needed to route the
284*4882a593SmuzhiyunGPIO signal to the appropriate pin should occur within a GPIO driver's
285*4882a593Smuzhiyun.direction_input() or .direction_output() operations, and occur after any
286*4882a593Smuzhiyunsetup of an output GPIO's value. This allows a glitch-free migration from a
287*4882a593Smuzhiyunpin's special function to GPIO. This is sometimes required when using a GPIO
288*4882a593Smuzhiyunto implement a workaround on signals typically driven by a non-GPIO HW block.
289*4882a593Smuzhiyun
290*4882a593SmuzhiyunSome platforms allow some or all GPIO signals to be routed to different pins.
291*4882a593SmuzhiyunSimilarly, other aspects of the GPIO or pin may need to be configured, such as
292*4882a593Smuzhiyunpullup/pulldown. Platform software should arrange that any such details are
293*4882a593Smuzhiyunconfigured prior to gpio_request() being called for those GPIOs, e.g. using
294*4882a593Smuzhiyunthe pinctrl subsystem's mapping table, so that GPIO users need not be aware
295*4882a593Smuzhiyunof these details.
296*4882a593Smuzhiyun
297*4882a593SmuzhiyunAlso note that it's your responsibility to have stopped using a GPIO
298*4882a593Smuzhiyunbefore you free it.
299*4882a593Smuzhiyun
300*4882a593SmuzhiyunConsidering in most cases GPIOs are actually configured right after they
301*4882a593Smuzhiyunare claimed, three additional calls are defined::
302*4882a593Smuzhiyun
303*4882a593Smuzhiyun	/* request a single GPIO, with initial configuration specified by
304*4882a593Smuzhiyun	 * 'flags', identical to gpio_request() wrt other arguments and
305*4882a593Smuzhiyun	 * return value
306*4882a593Smuzhiyun	 */
307*4882a593Smuzhiyun	int gpio_request_one(unsigned gpio, unsigned long flags, const char *label);
308*4882a593Smuzhiyun
309*4882a593Smuzhiyun	/* request multiple GPIOs in a single call
310*4882a593Smuzhiyun	 */
311*4882a593Smuzhiyun	int gpio_request_array(struct gpio *array, size_t num);
312*4882a593Smuzhiyun
313*4882a593Smuzhiyun	/* release multiple GPIOs in a single call
314*4882a593Smuzhiyun	 */
315*4882a593Smuzhiyun	void gpio_free_array(struct gpio *array, size_t num);
316*4882a593Smuzhiyun
317*4882a593Smuzhiyunwhere 'flags' is currently defined to specify the following properties:
318*4882a593Smuzhiyun
319*4882a593Smuzhiyun	* GPIOF_DIR_IN		- to configure direction as input
320*4882a593Smuzhiyun	* GPIOF_DIR_OUT		- to configure direction as output
321*4882a593Smuzhiyun
322*4882a593Smuzhiyun	* GPIOF_INIT_LOW	- as output, set initial level to LOW
323*4882a593Smuzhiyun	* GPIOF_INIT_HIGH	- as output, set initial level to HIGH
324*4882a593Smuzhiyun	* GPIOF_OPEN_DRAIN	- gpio pin is open drain type.
325*4882a593Smuzhiyun	* GPIOF_OPEN_SOURCE	- gpio pin is open source type.
326*4882a593Smuzhiyun
327*4882a593Smuzhiyun	* GPIOF_EXPORT_DIR_FIXED	- export gpio to sysfs, keep direction
328*4882a593Smuzhiyun	* GPIOF_EXPORT_DIR_CHANGEABLE	- also export, allow changing direction
329*4882a593Smuzhiyun
330*4882a593Smuzhiyunsince GPIOF_INIT_* are only valid when configured as output, so group valid
331*4882a593Smuzhiyuncombinations as:
332*4882a593Smuzhiyun
333*4882a593Smuzhiyun	* GPIOF_IN		- configure as input
334*4882a593Smuzhiyun	* GPIOF_OUT_INIT_LOW	- configured as output, initial level LOW
335*4882a593Smuzhiyun	* GPIOF_OUT_INIT_HIGH	- configured as output, initial level HIGH
336*4882a593Smuzhiyun
337*4882a593SmuzhiyunWhen setting the flag as GPIOF_OPEN_DRAIN then it will assume that pins is
338*4882a593Smuzhiyunopen drain type. Such pins will not be driven to 1 in output mode. It is
339*4882a593Smuzhiyunrequire to connect pull-up on such pins. By enabling this flag, gpio lib will
340*4882a593Smuzhiyunmake the direction to input when it is asked to set value of 1 in output mode
341*4882a593Smuzhiyunto make the pin HIGH. The pin is make to LOW by driving value 0 in output mode.
342*4882a593Smuzhiyun
343*4882a593SmuzhiyunWhen setting the flag as GPIOF_OPEN_SOURCE then it will assume that pins is
344*4882a593Smuzhiyunopen source type. Such pins will not be driven to 0 in output mode. It is
345*4882a593Smuzhiyunrequire to connect pull-down on such pin. By enabling this flag, gpio lib will
346*4882a593Smuzhiyunmake the direction to input when it is asked to set value of 0 in output mode
347*4882a593Smuzhiyunto make the pin LOW. The pin is make to HIGH by driving value 1 in output mode.
348*4882a593Smuzhiyun
349*4882a593SmuzhiyunIn the future, these flags can be extended to support more properties.
350*4882a593Smuzhiyun
351*4882a593SmuzhiyunFurther more, to ease the claim/release of multiple GPIOs, 'struct gpio' is
352*4882a593Smuzhiyunintroduced to encapsulate all three fields as::
353*4882a593Smuzhiyun
354*4882a593Smuzhiyun	struct gpio {
355*4882a593Smuzhiyun		unsigned	gpio;
356*4882a593Smuzhiyun		unsigned long	flags;
357*4882a593Smuzhiyun		const char	*label;
358*4882a593Smuzhiyun	};
359*4882a593Smuzhiyun
360*4882a593SmuzhiyunA typical example of usage::
361*4882a593Smuzhiyun
362*4882a593Smuzhiyun	static struct gpio leds_gpios[] = {
363*4882a593Smuzhiyun		{ 32, GPIOF_OUT_INIT_HIGH, "Power LED" }, /* default to ON */
364*4882a593Smuzhiyun		{ 33, GPIOF_OUT_INIT_LOW,  "Green LED" }, /* default to OFF */
365*4882a593Smuzhiyun		{ 34, GPIOF_OUT_INIT_LOW,  "Red LED"   }, /* default to OFF */
366*4882a593Smuzhiyun		{ 35, GPIOF_OUT_INIT_LOW,  "Blue LED"  }, /* default to OFF */
367*4882a593Smuzhiyun		{ ... },
368*4882a593Smuzhiyun	};
369*4882a593Smuzhiyun
370*4882a593Smuzhiyun	err = gpio_request_one(31, GPIOF_IN, "Reset Button");
371*4882a593Smuzhiyun	if (err)
372*4882a593Smuzhiyun		...
373*4882a593Smuzhiyun
374*4882a593Smuzhiyun	err = gpio_request_array(leds_gpios, ARRAY_SIZE(leds_gpios));
375*4882a593Smuzhiyun	if (err)
376*4882a593Smuzhiyun		...
377*4882a593Smuzhiyun
378*4882a593Smuzhiyun	gpio_free_array(leds_gpios, ARRAY_SIZE(leds_gpios));
379*4882a593Smuzhiyun
380*4882a593Smuzhiyun
381*4882a593SmuzhiyunGPIOs mapped to IRQs
382*4882a593Smuzhiyun--------------------
383*4882a593SmuzhiyunGPIO numbers are unsigned integers; so are IRQ numbers.  These make up
384*4882a593Smuzhiyuntwo logically distinct namespaces (GPIO 0 need not use IRQ 0).  You can
385*4882a593Smuzhiyunmap between them using calls like::
386*4882a593Smuzhiyun
387*4882a593Smuzhiyun	/* map GPIO numbers to IRQ numbers */
388*4882a593Smuzhiyun	int gpio_to_irq(unsigned gpio);
389*4882a593Smuzhiyun
390*4882a593Smuzhiyun	/* map IRQ numbers to GPIO numbers (avoid using this) */
391*4882a593Smuzhiyun	int irq_to_gpio(unsigned irq);
392*4882a593Smuzhiyun
393*4882a593SmuzhiyunThose return either the corresponding number in the other namespace, or
394*4882a593Smuzhiyunelse a negative errno code if the mapping can't be done.  (For example,
395*4882a593Smuzhiyunsome GPIOs can't be used as IRQs.)  It is an unchecked error to use a GPIO
396*4882a593Smuzhiyunnumber that wasn't set up as an input using gpio_direction_input(), or
397*4882a593Smuzhiyunto use an IRQ number that didn't originally come from gpio_to_irq().
398*4882a593Smuzhiyun
399*4882a593SmuzhiyunThese two mapping calls are expected to cost on the order of a single
400*4882a593Smuzhiyunaddition or subtraction.  They're not allowed to sleep.
401*4882a593Smuzhiyun
402*4882a593SmuzhiyunNon-error values returned from gpio_to_irq() can be passed to request_irq()
403*4882a593Smuzhiyunor free_irq().  They will often be stored into IRQ resources for platform
404*4882a593Smuzhiyundevices, by the board-specific initialization code.  Note that IRQ trigger
405*4882a593Smuzhiyunoptions are part of the IRQ interface, e.g. IRQF_TRIGGER_FALLING, as are
406*4882a593Smuzhiyunsystem wakeup capabilities.
407*4882a593Smuzhiyun
408*4882a593SmuzhiyunNon-error values returned from irq_to_gpio() would most commonly be used
409*4882a593Smuzhiyunwith gpio_get_value(), for example to initialize or update driver state
410*4882a593Smuzhiyunwhen the IRQ is edge-triggered.  Note that some platforms don't support
411*4882a593Smuzhiyunthis reverse mapping, so you should avoid using it.
412*4882a593Smuzhiyun
413*4882a593Smuzhiyun
414*4882a593SmuzhiyunEmulating Open Drain Signals
415*4882a593Smuzhiyun----------------------------
416*4882a593SmuzhiyunSometimes shared signals need to use "open drain" signaling, where only the
417*4882a593Smuzhiyunlow signal level is actually driven.  (That term applies to CMOS transistors;
418*4882a593Smuzhiyun"open collector" is used for TTL.)  A pullup resistor causes the high signal
419*4882a593Smuzhiyunlevel.  This is sometimes called a "wire-AND"; or more practically, from the
420*4882a593Smuzhiyunnegative logic (low=true) perspective this is a "wire-OR".
421*4882a593Smuzhiyun
422*4882a593SmuzhiyunOne common example of an open drain signal is a shared active-low IRQ line.
423*4882a593SmuzhiyunAlso, bidirectional data bus signals sometimes use open drain signals.
424*4882a593Smuzhiyun
425*4882a593SmuzhiyunSome GPIO controllers directly support open drain outputs; many don't.  When
426*4882a593Smuzhiyunyou need open drain signaling but your hardware doesn't directly support it,
427*4882a593Smuzhiyunthere's a common idiom you can use to emulate it with any GPIO pin that can
428*4882a593Smuzhiyunbe used as either an input or an output:
429*4882a593Smuzhiyun
430*4882a593Smuzhiyun LOW:	gpio_direction_output(gpio, 0) ... this drives the signal
431*4882a593Smuzhiyun	and overrides the pullup.
432*4882a593Smuzhiyun
433*4882a593Smuzhiyun HIGH:	gpio_direction_input(gpio) ... this turns off the output,
434*4882a593Smuzhiyun	so the pullup (or some other device) controls the signal.
435*4882a593Smuzhiyun
436*4882a593SmuzhiyunIf you are "driving" the signal high but gpio_get_value(gpio) reports a low
437*4882a593Smuzhiyunvalue (after the appropriate rise time passes), you know some other component
438*4882a593Smuzhiyunis driving the shared signal low.  That's not necessarily an error.  As one
439*4882a593Smuzhiyuncommon example, that's how I2C clocks are stretched:  a slave that needs a
440*4882a593Smuzhiyunslower clock delays the rising edge of SCK, and the I2C master adjusts its
441*4882a593Smuzhiyunsignaling rate accordingly.
442*4882a593Smuzhiyun
443*4882a593Smuzhiyun
444*4882a593SmuzhiyunGPIO controllers and the pinctrl subsystem
445*4882a593Smuzhiyun------------------------------------------
446*4882a593Smuzhiyun
447*4882a593SmuzhiyunA GPIO controller on a SOC might be tightly coupled with the pinctrl
448*4882a593Smuzhiyunsubsystem, in the sense that the pins can be used by other functions
449*4882a593Smuzhiyuntogether with an optional gpio feature. We have already covered the
450*4882a593Smuzhiyuncase where e.g. a GPIO controller need to reserve a pin or set the
451*4882a593Smuzhiyundirection of a pin by calling any of::
452*4882a593Smuzhiyun
453*4882a593Smuzhiyun  pinctrl_gpio_request()
454*4882a593Smuzhiyun  pinctrl_gpio_free()
455*4882a593Smuzhiyun  pinctrl_gpio_direction_input()
456*4882a593Smuzhiyun  pinctrl_gpio_direction_output()
457*4882a593Smuzhiyun
458*4882a593SmuzhiyunBut how does the pin control subsystem cross-correlate the GPIO
459*4882a593Smuzhiyunnumbers (which are a global business) to a certain pin on a certain
460*4882a593Smuzhiyunpin controller?
461*4882a593Smuzhiyun
462*4882a593SmuzhiyunThis is done by registering "ranges" of pins, which are essentially
463*4882a593Smuzhiyuncross-reference tables. These are described in
464*4882a593SmuzhiyunDocumentation/driver-api/pinctl.rst
465*4882a593Smuzhiyun
466*4882a593SmuzhiyunWhile the pin allocation is totally managed by the pinctrl subsystem,
467*4882a593Smuzhiyungpio (under gpiolib) is still maintained by gpio drivers. It may happen
468*4882a593Smuzhiyunthat different pin ranges in a SoC is managed by different gpio drivers.
469*4882a593Smuzhiyun
470*4882a593SmuzhiyunThis makes it logical to let gpio drivers announce their pin ranges to
471*4882a593Smuzhiyunthe pin ctrl subsystem before it will call 'pinctrl_gpio_request' in order
472*4882a593Smuzhiyunto request the corresponding pin to be prepared by the pinctrl subsystem
473*4882a593Smuzhiyunbefore any gpio usage.
474*4882a593Smuzhiyun
475*4882a593SmuzhiyunFor this, the gpio controller can register its pin range with pinctrl
476*4882a593Smuzhiyunsubsystem. There are two ways of doing it currently: with or without DT.
477*4882a593Smuzhiyun
478*4882a593SmuzhiyunFor with DT support refer to Documentation/devicetree/bindings/gpio/gpio.txt.
479*4882a593Smuzhiyun
480*4882a593SmuzhiyunFor non-DT support, user can call gpiochip_add_pin_range() with appropriate
481*4882a593Smuzhiyunparameters to register a range of gpio pins with a pinctrl driver. For this
482*4882a593Smuzhiyunexact name string of pinctrl device has to be passed as one of the
483*4882a593Smuzhiyunargument to this routine.
484*4882a593Smuzhiyun
485*4882a593Smuzhiyun
486*4882a593SmuzhiyunWhat do these conventions omit?
487*4882a593Smuzhiyun===============================
488*4882a593SmuzhiyunOne of the biggest things these conventions omit is pin multiplexing, since
489*4882a593Smuzhiyunthis is highly chip-specific and nonportable.  One platform might not need
490*4882a593Smuzhiyunexplicit multiplexing; another might have just two options for use of any
491*4882a593Smuzhiyungiven pin; another might have eight options per pin; another might be able
492*4882a593Smuzhiyunto route a given GPIO to any one of several pins.  (Yes, those examples all
493*4882a593Smuzhiyuncome from systems that run Linux today.)
494*4882a593Smuzhiyun
495*4882a593SmuzhiyunRelated to multiplexing is configuration and enabling of the pullups or
496*4882a593Smuzhiyunpulldowns integrated on some platforms.  Not all platforms support them,
497*4882a593Smuzhiyunor support them in the same way; and any given board might use external
498*4882a593Smuzhiyunpullups (or pulldowns) so that the on-chip ones should not be used.
499*4882a593Smuzhiyun(When a circuit needs 5 kOhm, on-chip 100 kOhm resistors won't do.)
500*4882a593SmuzhiyunLikewise drive strength (2 mA vs 20 mA) and voltage (1.8V vs 3.3V) is a
501*4882a593Smuzhiyunplatform-specific issue, as are models like (not) having a one-to-one
502*4882a593Smuzhiyuncorrespondence between configurable pins and GPIOs.
503*4882a593Smuzhiyun
504*4882a593SmuzhiyunThere are other system-specific mechanisms that are not specified here,
505*4882a593Smuzhiyunlike the aforementioned options for input de-glitching and wire-OR output.
506*4882a593SmuzhiyunHardware may support reading or writing GPIOs in gangs, but that's usually
507*4882a593Smuzhiyunconfiguration dependent:  for GPIOs sharing the same bank.  (GPIOs are
508*4882a593Smuzhiyuncommonly grouped in banks of 16 or 32, with a given SOC having several such
509*4882a593Smuzhiyunbanks.)  Some systems can trigger IRQs from output GPIOs, or read values
510*4882a593Smuzhiyunfrom pins not managed as GPIOs.  Code relying on such mechanisms will
511*4882a593Smuzhiyunnecessarily be nonportable.
512*4882a593Smuzhiyun
513*4882a593SmuzhiyunDynamic definition of GPIOs is not currently standard; for example, as
514*4882a593Smuzhiyuna side effect of configuring an add-on board with some GPIO expanders.
515*4882a593Smuzhiyun
516*4882a593Smuzhiyun
517*4882a593SmuzhiyunGPIO implementor's framework (OPTIONAL)
518*4882a593Smuzhiyun=======================================
519*4882a593SmuzhiyunAs noted earlier, there is an optional implementation framework making it
520*4882a593Smuzhiyuneasier for platforms to support different kinds of GPIO controller using
521*4882a593Smuzhiyunthe same programming interface.  This framework is called "gpiolib".
522*4882a593Smuzhiyun
523*4882a593SmuzhiyunAs a debugging aid, if debugfs is available a /sys/kernel/debug/gpio file
524*4882a593Smuzhiyunwill be found there.  That will list all the controllers registered through
525*4882a593Smuzhiyunthis framework, and the state of the GPIOs currently in use.
526*4882a593Smuzhiyun
527*4882a593Smuzhiyun
528*4882a593SmuzhiyunController Drivers: gpio_chip
529*4882a593Smuzhiyun-----------------------------
530*4882a593SmuzhiyunIn this framework each GPIO controller is packaged as a "struct gpio_chip"
531*4882a593Smuzhiyunwith information common to each controller of that type:
532*4882a593Smuzhiyun
533*4882a593Smuzhiyun - methods to establish GPIO direction
534*4882a593Smuzhiyun - methods used to access GPIO values
535*4882a593Smuzhiyun - flag saying whether calls to its methods may sleep
536*4882a593Smuzhiyun - optional debugfs dump method (showing extra state like pullup config)
537*4882a593Smuzhiyun - label for diagnostics
538*4882a593Smuzhiyun
539*4882a593SmuzhiyunThere is also per-instance data, which may come from device.platform_data:
540*4882a593Smuzhiyunthe number of its first GPIO, and how many GPIOs it exposes.
541*4882a593Smuzhiyun
542*4882a593SmuzhiyunThe code implementing a gpio_chip should support multiple instances of the
543*4882a593Smuzhiyuncontroller, possibly using the driver model.  That code will configure each
544*4882a593Smuzhiyungpio_chip and issue gpiochip_add().  Removing a GPIO controller should be
545*4882a593Smuzhiyunrare; use gpiochip_remove() when it is unavoidable.
546*4882a593Smuzhiyun
547*4882a593SmuzhiyunMost often a gpio_chip is part of an instance-specific structure with state
548*4882a593Smuzhiyunnot exposed by the GPIO interfaces, such as addressing, power management,
549*4882a593Smuzhiyunand more.  Chips such as codecs will have complex non-GPIO state.
550*4882a593Smuzhiyun
551*4882a593SmuzhiyunAny debugfs dump method should normally ignore signals which haven't been
552*4882a593Smuzhiyunrequested as GPIOs.  They can use gpiochip_is_requested(), which returns
553*4882a593Smuzhiyuneither NULL or the label associated with that GPIO when it was requested.
554*4882a593Smuzhiyun
555*4882a593Smuzhiyun
556*4882a593SmuzhiyunPlatform Support
557*4882a593Smuzhiyun----------------
558*4882a593SmuzhiyunTo force-enable this framework, a platform's Kconfig will "select" GPIOLIB,
559*4882a593Smuzhiyunelse it is up to the user to configure support for GPIO.
560*4882a593Smuzhiyun
561*4882a593SmuzhiyunIt may also provide a custom value for ARCH_NR_GPIOS, so that it better
562*4882a593Smuzhiyunreflects the number of GPIOs in actual use on that platform, without
563*4882a593Smuzhiyunwasting static table space.  (It should count both built-in/SoC GPIOs and
564*4882a593Smuzhiyunalso ones on GPIO expanders.
565*4882a593Smuzhiyun
566*4882a593SmuzhiyunIf neither of these options are selected, the platform does not support
567*4882a593SmuzhiyunGPIOs through GPIO-lib and the code cannot be enabled by the user.
568*4882a593Smuzhiyun
569*4882a593SmuzhiyunTrivial implementations of those functions can directly use framework
570*4882a593Smuzhiyuncode, which always dispatches through the gpio_chip::
571*4882a593Smuzhiyun
572*4882a593Smuzhiyun  #define gpio_get_value	__gpio_get_value
573*4882a593Smuzhiyun  #define gpio_set_value	__gpio_set_value
574*4882a593Smuzhiyun  #define gpio_cansleep		__gpio_cansleep
575*4882a593Smuzhiyun
576*4882a593SmuzhiyunFancier implementations could instead define those as inline functions with
577*4882a593Smuzhiyunlogic optimizing access to specific SOC-based GPIOs.  For example, if the
578*4882a593Smuzhiyunreferenced GPIO is the constant "12", getting or setting its value could
579*4882a593Smuzhiyuncost as little as two or three instructions, never sleeping.  When such an
580*4882a593Smuzhiyunoptimization is not possible those calls must delegate to the framework
581*4882a593Smuzhiyuncode, costing at least a few dozen instructions.  For bitbanged I/O, such
582*4882a593Smuzhiyuninstruction savings can be significant.
583*4882a593Smuzhiyun
584*4882a593SmuzhiyunFor SOCs, platform-specific code defines and registers gpio_chip instances
585*4882a593Smuzhiyunfor each bank of on-chip GPIOs.  Those GPIOs should be numbered/labeled to
586*4882a593Smuzhiyunmatch chip vendor documentation, and directly match board schematics.  They
587*4882a593Smuzhiyunmay well start at zero and go up to a platform-specific limit.  Such GPIOs
588*4882a593Smuzhiyunare normally integrated into platform initialization to make them always be
589*4882a593Smuzhiyunavailable, from arch_initcall() or earlier; they can often serve as IRQs.
590*4882a593Smuzhiyun
591*4882a593Smuzhiyun
592*4882a593SmuzhiyunBoard Support
593*4882a593Smuzhiyun-------------
594*4882a593SmuzhiyunFor external GPIO controllers -- such as I2C or SPI expanders, ASICs, multi
595*4882a593Smuzhiyunfunction devices, FPGAs or CPLDs -- most often board-specific code handles
596*4882a593Smuzhiyunregistering controller devices and ensures that their drivers know what GPIO
597*4882a593Smuzhiyunnumbers to use with gpiochip_add().  Their numbers often start right after
598*4882a593Smuzhiyunplatform-specific GPIOs.
599*4882a593Smuzhiyun
600*4882a593SmuzhiyunFor example, board setup code could create structures identifying the range
601*4882a593Smuzhiyunof GPIOs that chip will expose, and passes them to each GPIO expander chip
602*4882a593Smuzhiyunusing platform_data.  Then the chip driver's probe() routine could pass that
603*4882a593Smuzhiyundata to gpiochip_add().
604*4882a593Smuzhiyun
605*4882a593SmuzhiyunInitialization order can be important.  For example, when a device relies on
606*4882a593Smuzhiyunan I2C-based GPIO, its probe() routine should only be called after that GPIO
607*4882a593Smuzhiyunbecomes available.  That may mean the device should not be registered until
608*4882a593Smuzhiyuncalls for that GPIO can work.  One way to address such dependencies is for
609*4882a593Smuzhiyunsuch gpio_chip controllers to provide setup() and teardown() callbacks to
610*4882a593Smuzhiyunboard specific code; those board specific callbacks would register devices
611*4882a593Smuzhiyunonce all the necessary resources are available, and remove them later when
612*4882a593Smuzhiyunthe GPIO controller device becomes unavailable.
613*4882a593Smuzhiyun
614*4882a593Smuzhiyun
615*4882a593SmuzhiyunSysfs Interface for Userspace (OPTIONAL)
616*4882a593Smuzhiyun========================================
617*4882a593SmuzhiyunPlatforms which use the "gpiolib" implementors framework may choose to
618*4882a593Smuzhiyunconfigure a sysfs user interface to GPIOs.  This is different from the
619*4882a593Smuzhiyundebugfs interface, since it provides control over GPIO direction and
620*4882a593Smuzhiyunvalue instead of just showing a gpio state summary.  Plus, it could be
621*4882a593Smuzhiyunpresent on production systems without debugging support.
622*4882a593Smuzhiyun
623*4882a593SmuzhiyunGiven appropriate hardware documentation for the system, userspace could
624*4882a593Smuzhiyunknow for example that GPIO #23 controls the write protect line used to
625*4882a593Smuzhiyunprotect boot loader segments in flash memory.  System upgrade procedures
626*4882a593Smuzhiyunmay need to temporarily remove that protection, first importing a GPIO,
627*4882a593Smuzhiyunthen changing its output state, then updating the code before re-enabling
628*4882a593Smuzhiyunthe write protection.  In normal use, GPIO #23 would never be touched,
629*4882a593Smuzhiyunand the kernel would have no need to know about it.
630*4882a593Smuzhiyun
631*4882a593SmuzhiyunAgain depending on appropriate hardware documentation, on some systems
632*4882a593Smuzhiyunuserspace GPIO can be used to determine system configuration data that
633*4882a593Smuzhiyunstandard kernels won't know about.  And for some tasks, simple userspace
634*4882a593SmuzhiyunGPIO drivers could be all that the system really needs.
635*4882a593Smuzhiyun
636*4882a593SmuzhiyunNote that standard kernel drivers exist for common "LEDs and Buttons"
637*4882a593SmuzhiyunGPIO tasks:  "leds-gpio" and "gpio_keys", respectively.  Use those
638*4882a593Smuzhiyuninstead of talking directly to the GPIOs; they integrate with kernel
639*4882a593Smuzhiyunframeworks better than your userspace code could.
640*4882a593Smuzhiyun
641*4882a593Smuzhiyun
642*4882a593SmuzhiyunPaths in Sysfs
643*4882a593Smuzhiyun--------------
644*4882a593SmuzhiyunThere are three kinds of entry in /sys/class/gpio:
645*4882a593Smuzhiyun
646*4882a593Smuzhiyun   -	Control interfaces used to get userspace control over GPIOs;
647*4882a593Smuzhiyun
648*4882a593Smuzhiyun   -	GPIOs themselves; and
649*4882a593Smuzhiyun
650*4882a593Smuzhiyun   -	GPIO controllers ("gpio_chip" instances).
651*4882a593Smuzhiyun
652*4882a593SmuzhiyunThat's in addition to standard files including the "device" symlink.
653*4882a593Smuzhiyun
654*4882a593SmuzhiyunThe control interfaces are write-only:
655*4882a593Smuzhiyun
656*4882a593Smuzhiyun    /sys/class/gpio/
657*4882a593Smuzhiyun
658*4882a593Smuzhiyun    	"export" ... Userspace may ask the kernel to export control of
659*4882a593Smuzhiyun		a GPIO to userspace by writing its number to this file.
660*4882a593Smuzhiyun
661*4882a593Smuzhiyun		Example:  "echo 19 > export" will create a "gpio19" node
662*4882a593Smuzhiyun		for GPIO #19, if that's not requested by kernel code.
663*4882a593Smuzhiyun
664*4882a593Smuzhiyun    	"unexport" ... Reverses the effect of exporting to userspace.
665*4882a593Smuzhiyun
666*4882a593Smuzhiyun		Example:  "echo 19 > unexport" will remove a "gpio19"
667*4882a593Smuzhiyun		node exported using the "export" file.
668*4882a593Smuzhiyun
669*4882a593SmuzhiyunGPIO signals have paths like /sys/class/gpio/gpio42/ (for GPIO #42)
670*4882a593Smuzhiyunand have the following read/write attributes:
671*4882a593Smuzhiyun
672*4882a593Smuzhiyun    /sys/class/gpio/gpioN/
673*4882a593Smuzhiyun
674*4882a593Smuzhiyun	"direction" ... reads as either "in" or "out".  This value may
675*4882a593Smuzhiyun		normally be written.  Writing as "out" defaults to
676*4882a593Smuzhiyun		initializing the value as low.  To ensure glitch free
677*4882a593Smuzhiyun		operation, values "low" and "high" may be written to
678*4882a593Smuzhiyun		configure the GPIO as an output with that initial value.
679*4882a593Smuzhiyun
680*4882a593Smuzhiyun		Note that this attribute *will not exist* if the kernel
681*4882a593Smuzhiyun		doesn't support changing the direction of a GPIO, or
682*4882a593Smuzhiyun		it was exported by kernel code that didn't explicitly
683*4882a593Smuzhiyun		allow userspace to reconfigure this GPIO's direction.
684*4882a593Smuzhiyun
685*4882a593Smuzhiyun	"value" ... reads as either 0 (low) or 1 (high).  If the GPIO
686*4882a593Smuzhiyun		is configured as an output, this value may be written;
687*4882a593Smuzhiyun		any nonzero value is treated as high.
688*4882a593Smuzhiyun
689*4882a593Smuzhiyun		If the pin can be configured as interrupt-generating interrupt
690*4882a593Smuzhiyun		and if it has been configured to generate interrupts (see the
691*4882a593Smuzhiyun		description of "edge"), you can poll(2) on that file and
692*4882a593Smuzhiyun		poll(2) will return whenever the interrupt was triggered. If
693*4882a593Smuzhiyun		you use poll(2), set the events POLLPRI. If you use select(2),
694*4882a593Smuzhiyun		set the file descriptor in exceptfds. After poll(2) returns,
695*4882a593Smuzhiyun		either lseek(2) to the beginning of the sysfs file and read the
696*4882a593Smuzhiyun		new value or close the file and re-open it to read the value.
697*4882a593Smuzhiyun
698*4882a593Smuzhiyun	"edge" ... reads as either "none", "rising", "falling", or
699*4882a593Smuzhiyun		"both". Write these strings to select the signal edge(s)
700*4882a593Smuzhiyun		that will make poll(2) on the "value" file return.
701*4882a593Smuzhiyun
702*4882a593Smuzhiyun		This file exists only if the pin can be configured as an
703*4882a593Smuzhiyun		interrupt generating input pin.
704*4882a593Smuzhiyun
705*4882a593Smuzhiyun	"active_low" ... reads as either 0 (false) or 1 (true).  Write
706*4882a593Smuzhiyun		any nonzero value to invert the value attribute both
707*4882a593Smuzhiyun		for reading and writing.  Existing and subsequent
708*4882a593Smuzhiyun		poll(2) support configuration via the edge attribute
709*4882a593Smuzhiyun		for "rising" and "falling" edges will follow this
710*4882a593Smuzhiyun		setting.
711*4882a593Smuzhiyun
712*4882a593SmuzhiyunGPIO controllers have paths like /sys/class/gpio/gpiochip42/ (for the
713*4882a593Smuzhiyuncontroller implementing GPIOs starting at #42) and have the following
714*4882a593Smuzhiyunread-only attributes:
715*4882a593Smuzhiyun
716*4882a593Smuzhiyun    /sys/class/gpio/gpiochipN/
717*4882a593Smuzhiyun
718*4882a593Smuzhiyun    	"base" ... same as N, the first GPIO managed by this chip
719*4882a593Smuzhiyun
720*4882a593Smuzhiyun    	"label" ... provided for diagnostics (not always unique)
721*4882a593Smuzhiyun
722*4882a593Smuzhiyun    	"ngpio" ... how many GPIOs this manges (N to N + ngpio - 1)
723*4882a593Smuzhiyun
724*4882a593SmuzhiyunBoard documentation should in most cases cover what GPIOs are used for
725*4882a593Smuzhiyunwhat purposes.  However, those numbers are not always stable; GPIOs on
726*4882a593Smuzhiyuna daughtercard might be different depending on the base board being used,
727*4882a593Smuzhiyunor other cards in the stack.  In such cases, you may need to use the
728*4882a593Smuzhiyungpiochip nodes (possibly in conjunction with schematics) to determine
729*4882a593Smuzhiyunthe correct GPIO number to use for a given signal.
730*4882a593Smuzhiyun
731*4882a593Smuzhiyun
732*4882a593SmuzhiyunExporting from Kernel code
733*4882a593Smuzhiyun--------------------------
734*4882a593SmuzhiyunKernel code can explicitly manage exports of GPIOs which have already been
735*4882a593Smuzhiyunrequested using gpio_request()::
736*4882a593Smuzhiyun
737*4882a593Smuzhiyun	/* export the GPIO to userspace */
738*4882a593Smuzhiyun	int gpio_export(unsigned gpio, bool direction_may_change);
739*4882a593Smuzhiyun
740*4882a593Smuzhiyun	/* reverse gpio_export() */
741*4882a593Smuzhiyun	void gpio_unexport();
742*4882a593Smuzhiyun
743*4882a593Smuzhiyun	/* create a sysfs link to an exported GPIO node */
744*4882a593Smuzhiyun	int gpio_export_link(struct device *dev, const char *name,
745*4882a593Smuzhiyun		unsigned gpio)
746*4882a593Smuzhiyun
747*4882a593SmuzhiyunAfter a kernel driver requests a GPIO, it may only be made available in
748*4882a593Smuzhiyunthe sysfs interface by gpio_export().  The driver can control whether the
749*4882a593Smuzhiyunsignal direction may change.  This helps drivers prevent userspace code
750*4882a593Smuzhiyunfrom accidentally clobbering important system state.
751*4882a593Smuzhiyun
752*4882a593SmuzhiyunThis explicit exporting can help with debugging (by making some kinds
753*4882a593Smuzhiyunof experiments easier), or can provide an always-there interface that's
754*4882a593Smuzhiyunsuitable for documenting as part of a board support package.
755*4882a593Smuzhiyun
756*4882a593SmuzhiyunAfter the GPIO has been exported, gpio_export_link() allows creating
757*4882a593Smuzhiyunsymlinks from elsewhere in sysfs to the GPIO sysfs node.  Drivers can
758*4882a593Smuzhiyunuse this to provide the interface under their own device in sysfs with
759*4882a593Smuzhiyuna descriptive name.
760*4882a593Smuzhiyun
761*4882a593Smuzhiyun
762*4882a593SmuzhiyunAPI Reference
763*4882a593Smuzhiyun=============
764*4882a593Smuzhiyun
765*4882a593SmuzhiyunThe functions listed in this section are deprecated. The GPIO descriptor based
766*4882a593SmuzhiyunAPI should be used in new code.
767*4882a593Smuzhiyun
768*4882a593Smuzhiyun.. kernel-doc:: drivers/gpio/gpiolib-legacy.c
769*4882a593Smuzhiyun   :export:
770