1*4882a593SmuzhiyunFPGA Manager 2*4882a593Smuzhiyun============ 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunOverview 5*4882a593Smuzhiyun-------- 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunThe FPGA manager core exports a set of functions for programming an FPGA with 8*4882a593Smuzhiyunan image. The API is manufacturer agnostic. All manufacturer specifics are 9*4882a593Smuzhiyunhidden away in a low level driver which registers a set of ops with the core. 10*4882a593SmuzhiyunThe FPGA image data itself is very manufacturer specific, but for our purposes 11*4882a593Smuzhiyunit's just binary data. The FPGA manager core won't parse it. 12*4882a593Smuzhiyun 13*4882a593SmuzhiyunThe FPGA image to be programmed can be in a scatter gather list, a single 14*4882a593Smuzhiyuncontiguous buffer, or a firmware file. Because allocating contiguous kernel 15*4882a593Smuzhiyunmemory for the buffer should be avoided, users are encouraged to use a scatter 16*4882a593Smuzhiyungather list instead if possible. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunThe particulars for programming the image are presented in a structure (struct 19*4882a593Smuzhiyunfpga_image_info). This struct contains parameters such as pointers to the 20*4882a593SmuzhiyunFPGA image as well as image-specific particulars such as whether the image was 21*4882a593Smuzhiyunbuilt for full or partial reconfiguration. 22*4882a593Smuzhiyun 23*4882a593SmuzhiyunHow to support a new FPGA device 24*4882a593Smuzhiyun-------------------------------- 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunTo add another FPGA manager, write a driver that implements a set of ops. The 27*4882a593Smuzhiyunprobe function calls fpga_mgr_register(), such as:: 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun static const struct fpga_manager_ops socfpga_fpga_ops = { 30*4882a593Smuzhiyun .write_init = socfpga_fpga_ops_configure_init, 31*4882a593Smuzhiyun .write = socfpga_fpga_ops_configure_write, 32*4882a593Smuzhiyun .write_complete = socfpga_fpga_ops_configure_complete, 33*4882a593Smuzhiyun .state = socfpga_fpga_ops_state, 34*4882a593Smuzhiyun }; 35*4882a593Smuzhiyun 36*4882a593Smuzhiyun static int socfpga_fpga_probe(struct platform_device *pdev) 37*4882a593Smuzhiyun { 38*4882a593Smuzhiyun struct device *dev = &pdev->dev; 39*4882a593Smuzhiyun struct socfpga_fpga_priv *priv; 40*4882a593Smuzhiyun struct fpga_manager *mgr; 41*4882a593Smuzhiyun int ret; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun priv = devm_kzalloc(dev, sizeof(*priv), GFP_KERNEL); 44*4882a593Smuzhiyun if (!priv) 45*4882a593Smuzhiyun return -ENOMEM; 46*4882a593Smuzhiyun 47*4882a593Smuzhiyun /* 48*4882a593Smuzhiyun * do ioremaps, get interrupts, etc. and save 49*4882a593Smuzhiyun * them in priv 50*4882a593Smuzhiyun */ 51*4882a593Smuzhiyun 52*4882a593Smuzhiyun mgr = devm_fpga_mgr_create(dev, "Altera SOCFPGA FPGA Manager", 53*4882a593Smuzhiyun &socfpga_fpga_ops, priv); 54*4882a593Smuzhiyun if (!mgr) 55*4882a593Smuzhiyun return -ENOMEM; 56*4882a593Smuzhiyun 57*4882a593Smuzhiyun platform_set_drvdata(pdev, mgr); 58*4882a593Smuzhiyun 59*4882a593Smuzhiyun return fpga_mgr_register(mgr); 60*4882a593Smuzhiyun } 61*4882a593Smuzhiyun 62*4882a593Smuzhiyun static int socfpga_fpga_remove(struct platform_device *pdev) 63*4882a593Smuzhiyun { 64*4882a593Smuzhiyun struct fpga_manager *mgr = platform_get_drvdata(pdev); 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun fpga_mgr_unregister(mgr); 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun return 0; 69*4882a593Smuzhiyun } 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun 72*4882a593SmuzhiyunThe ops will implement whatever device specific register writes are needed to 73*4882a593Smuzhiyundo the programming sequence for this particular FPGA. These ops return 0 for 74*4882a593Smuzhiyunsuccess or negative error codes otherwise. 75*4882a593Smuzhiyun 76*4882a593SmuzhiyunThe programming sequence is:: 77*4882a593Smuzhiyun 1. .write_init 78*4882a593Smuzhiyun 2. .write or .write_sg (may be called once or multiple times) 79*4882a593Smuzhiyun 3. .write_complete 80*4882a593Smuzhiyun 81*4882a593SmuzhiyunThe .write_init function will prepare the FPGA to receive the image data. The 82*4882a593Smuzhiyunbuffer passed into .write_init will be at most .initial_header_size bytes long; 83*4882a593Smuzhiyunif the whole bitstream is not immediately available then the core code will 84*4882a593Smuzhiyunbuffer up at least this much before starting. 85*4882a593Smuzhiyun 86*4882a593SmuzhiyunThe .write function writes a buffer to the FPGA. The buffer may be contain the 87*4882a593Smuzhiyunwhole FPGA image or may be a smaller chunk of an FPGA image. In the latter 88*4882a593Smuzhiyuncase, this function is called multiple times for successive chunks. This interface 89*4882a593Smuzhiyunis suitable for drivers which use PIO. 90*4882a593Smuzhiyun 91*4882a593SmuzhiyunThe .write_sg version behaves the same as .write except the input is a sg_table 92*4882a593Smuzhiyunscatter list. This interface is suitable for drivers which use DMA. 93*4882a593Smuzhiyun 94*4882a593SmuzhiyunThe .write_complete function is called after all the image has been written 95*4882a593Smuzhiyunto put the FPGA into operating mode. 96*4882a593Smuzhiyun 97*4882a593SmuzhiyunThe ops include a .state function which will determine the state the FPGA is in 98*4882a593Smuzhiyunand return a code of type enum fpga_mgr_states. It doesn't result in a change 99*4882a593Smuzhiyunin state. 100*4882a593Smuzhiyun 101*4882a593SmuzhiyunAPI for implementing a new FPGA Manager driver 102*4882a593Smuzhiyun---------------------------------------------- 103*4882a593Smuzhiyun 104*4882a593Smuzhiyun* ``fpga_mgr_states`` — Values for :c:expr:`fpga_manager->state`. 105*4882a593Smuzhiyun* struct fpga_manager — the FPGA manager struct 106*4882a593Smuzhiyun* struct fpga_manager_ops — Low level FPGA manager driver ops 107*4882a593Smuzhiyun* devm_fpga_mgr_create() — Allocate and init a manager struct 108*4882a593Smuzhiyun* fpga_mgr_register() — Register an FPGA manager 109*4882a593Smuzhiyun* fpga_mgr_unregister() — Unregister an FPGA manager 110*4882a593Smuzhiyun 111*4882a593Smuzhiyun.. kernel-doc:: include/linux/fpga/fpga-mgr.h 112*4882a593Smuzhiyun :functions: fpga_mgr_states 113*4882a593Smuzhiyun 114*4882a593Smuzhiyun.. kernel-doc:: include/linux/fpga/fpga-mgr.h 115*4882a593Smuzhiyun :functions: fpga_manager 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun.. kernel-doc:: include/linux/fpga/fpga-mgr.h 118*4882a593Smuzhiyun :functions: fpga_manager_ops 119*4882a593Smuzhiyun 120*4882a593Smuzhiyun.. kernel-doc:: drivers/fpga/fpga-mgr.c 121*4882a593Smuzhiyun :functions: devm_fpga_mgr_create 122*4882a593Smuzhiyun 123*4882a593Smuzhiyun.. kernel-doc:: drivers/fpga/fpga-mgr.c 124*4882a593Smuzhiyun :functions: fpga_mgr_register 125*4882a593Smuzhiyun 126*4882a593Smuzhiyun.. kernel-doc:: drivers/fpga/fpga-mgr.c 127*4882a593Smuzhiyun :functions: fpga_mgr_unregister 128