1*4882a593SmuzhiyunCE4100 Device Tree Bindings 2*4882a593Smuzhiyun--------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThe CE4100 SoC uses for in core peripherals the following compatible 5*4882a593Smuzhiyunformat: <vendor>,<chip>-<device>. 6*4882a593SmuzhiyunMany of the "generic" devices like HPET or IO APIC have the ce4100 7*4882a593Smuzhiyunname in their compatible property because they first appeared in this 8*4882a593SmuzhiyunSoC. 9*4882a593Smuzhiyun 10*4882a593SmuzhiyunThe CPU nodes 11*4882a593Smuzhiyun------------- 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun cpus { 14*4882a593Smuzhiyun #address-cells = <1>; 15*4882a593Smuzhiyun #size-cells = <0>; 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun cpu@0 { 18*4882a593Smuzhiyun device_type = "cpu"; 19*4882a593Smuzhiyun compatible = "intel,ce4100"; 20*4882a593Smuzhiyun reg = <0x00>; 21*4882a593Smuzhiyun }; 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun cpu@2 { 24*4882a593Smuzhiyun device_type = "cpu"; 25*4882a593Smuzhiyun compatible = "intel,ce4100"; 26*4882a593Smuzhiyun reg = <0x02>; 27*4882a593Smuzhiyun }; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunA "cpu" node describes one logical processor (hardware thread). 31*4882a593Smuzhiyun 32*4882a593SmuzhiyunRequired properties: 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun- device_type 35*4882a593Smuzhiyun Device type, must be "cpu". 36*4882a593Smuzhiyun 37*4882a593Smuzhiyun- reg 38*4882a593Smuzhiyun Local APIC ID, the unique number assigned to each processor by 39*4882a593Smuzhiyun system hardware. 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunThe SoC node 42*4882a593Smuzhiyun------------ 43*4882a593Smuzhiyun 44*4882a593SmuzhiyunThis node describes the in-core peripherals. Required property: 45*4882a593Smuzhiyun compatible = "intel,ce4100-cp"; 46*4882a593Smuzhiyun 47*4882a593SmuzhiyunThe PCI node 48*4882a593Smuzhiyun------------ 49*4882a593SmuzhiyunThis node describes the PCI bus on the SoC. Its property should be 50*4882a593Smuzhiyun compatible = "intel,ce4100-pci", "pci"; 51*4882a593Smuzhiyun 52*4882a593SmuzhiyunIf the OS is using the IO-APIC for interrupt routing then the reported 53*4882a593Smuzhiyuninterrupt numbers for devices is no longer true. In order to obtain the 54*4882a593Smuzhiyuncorrect interrupt number, the child node which represents the device has 55*4882a593Smuzhiyunto contain the interrupt property. Besides the interrupt property it has 56*4882a593Smuzhiyunto contain at least the reg property containing the PCI bus address and 57*4882a593Smuzhiyuncompatible property according to "PCI Bus Binding Revision 2.1". 58