1*4882a593SmuzhiyunXilinx AXI/PLB soft-core watchdog Device Tree Bindings 2*4882a593Smuzhiyun--------------------------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties: 5*4882a593Smuzhiyun- compatible : Should be "xlnx,xps-timebase-wdt-1.00.a" or 6*4882a593Smuzhiyun "xlnx,xps-timebase-wdt-1.01.a". 7*4882a593Smuzhiyun- reg : Physical base address and size 8*4882a593Smuzhiyun 9*4882a593SmuzhiyunOptional properties: 10*4882a593Smuzhiyun- clocks : Input clock specifier. Refer to common clock 11*4882a593Smuzhiyun bindings. 12*4882a593Smuzhiyun- clock-frequency : Frequency of clock in Hz 13*4882a593Smuzhiyun- xlnx,wdt-enable-once : 0 - Watchdog can be restarted 14*4882a593Smuzhiyun 1 - Watchdog can be enabled just once 15*4882a593Smuzhiyun- xlnx,wdt-interval : Watchdog timeout interval in 2^<val> clock cycles, 16*4882a593Smuzhiyun <val> is integer from 8 to 31. 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunExample: 19*4882a593Smuzhiyunaxi-timebase-wdt@40100000 { 20*4882a593Smuzhiyun clock-frequency = <50000000>; 21*4882a593Smuzhiyun compatible = "xlnx,xps-timebase-wdt-1.00.a"; 22*4882a593Smuzhiyun clocks = <&clkc 15>; 23*4882a593Smuzhiyun reg = <0x40100000 0x10000>; 24*4882a593Smuzhiyun xlnx,wdt-enable-once = <0x0>; 25*4882a593Smuzhiyun xlnx,wdt-interval = <0x1b>; 26*4882a593Smuzhiyun} ; 27