1*4882a593Smuzhiyun* Freescale mpc8xxx watchdog driver (For 83xx, 86xx and 8xx) 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: Shall contain one of the following: 5*4882a593Smuzhiyun "mpc83xx_wdt" for an mpc83xx 6*4882a593Smuzhiyun "fsl,mpc8610-wdt" for an mpc86xx 7*4882a593Smuzhiyun "fsl,mpc823-wdt" for an mpc8xx 8*4882a593Smuzhiyun- reg: base physical address and length of the area hosting the 9*4882a593Smuzhiyun watchdog registers. 10*4882a593Smuzhiyun On the 83xx, "Watchdog Timer Registers" area: <0x200 0x100> 11*4882a593Smuzhiyun On the 86xx, "Watchdog Timer Registers" area: <0xe4000 0x100> 12*4882a593Smuzhiyun On the 8xx, "General System Interface Unit" area: <0x0 0x10> 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunOptional properties: 15*4882a593Smuzhiyun- reg: additional physical address and length (4) of location of the 16*4882a593Smuzhiyun Reset Status Register (called RSTRSCR on the mpc86xx) 17*4882a593Smuzhiyun On the 83xx, it is located at offset 0x910 18*4882a593Smuzhiyun On the 86xx, it is located at offset 0xe0094 19*4882a593Smuzhiyun On the 8xx, it is located at offset 0x288 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunExample: 22*4882a593Smuzhiyun WDT: watchdog@0 { 23*4882a593Smuzhiyun compatible = "fsl,mpc823-wdt"; 24*4882a593Smuzhiyun reg = <0x0 0x10 0x288 0x4>; 25*4882a593Smuzhiyun }; 26