1*4882a593Smuzhiyun* Microchip PIC32 Watchdog Timer 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunWhen enabled, the watchdog peripheral can be used to reset the device if the 4*4882a593SmuzhiyunWDT is not cleared periodically in software. 5*4882a593Smuzhiyun 6*4882a593SmuzhiyunRequired properties: 7*4882a593Smuzhiyun- compatible: must be "microchip,pic32mzda-wdt". 8*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped 9*4882a593Smuzhiyun region. 10*4882a593Smuzhiyun- clocks: phandle of source clk. Should be <&rootclk LPRCCLK>. 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunExample: 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun watchdog@1f800800 { 15*4882a593Smuzhiyun compatible = "microchip,pic32mzda-wdt"; 16*4882a593Smuzhiyun reg = <0x1f800800 0x200>; 17*4882a593Smuzhiyun clocks = <&rootclk LPRCCLK>; 18*4882a593Smuzhiyun }; 19