1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/watchdog/arm,sp805.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: ARM AMBA Primecell SP805 Watchdog 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Viresh Kumar <vireshk@kernel.org> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyundescription: |+ 13*4882a593Smuzhiyun The Arm SP805 IP implements a watchdog device, which triggers an interrupt 14*4882a593Smuzhiyun after a configurable time period. If that interrupt has not been serviced 15*4882a593Smuzhiyun when the next interrupt would be triggered, the reset signal is asserted. 16*4882a593Smuzhiyun 17*4882a593SmuzhiyunallOf: 18*4882a593Smuzhiyun - $ref: /schemas/watchdog/watchdog.yaml# 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun# Need a custom select here or 'arm,primecell' will match on lots of nodes 21*4882a593Smuzhiyunselect: 22*4882a593Smuzhiyun properties: 23*4882a593Smuzhiyun compatible: 24*4882a593Smuzhiyun contains: 25*4882a593Smuzhiyun const: arm,sp805 26*4882a593Smuzhiyun required: 27*4882a593Smuzhiyun - compatible 28*4882a593Smuzhiyun 29*4882a593Smuzhiyunproperties: 30*4882a593Smuzhiyun compatible: 31*4882a593Smuzhiyun items: 32*4882a593Smuzhiyun - const: arm,sp805 33*4882a593Smuzhiyun - const: arm,primecell 34*4882a593Smuzhiyun 35*4882a593Smuzhiyun interrupts: 36*4882a593Smuzhiyun maxItems: 1 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun reg: 39*4882a593Smuzhiyun maxItems: 1 40*4882a593Smuzhiyun 41*4882a593Smuzhiyun clocks: 42*4882a593Smuzhiyun description: | 43*4882a593Smuzhiyun Clocks driving the watchdog timer hardware. The first clock is used 44*4882a593Smuzhiyun for the actual watchdog counter. The second clock drives the register 45*4882a593Smuzhiyun interface. 46*4882a593Smuzhiyun minItems: 2 47*4882a593Smuzhiyun maxItems: 2 48*4882a593Smuzhiyun 49*4882a593Smuzhiyun clock-names: 50*4882a593Smuzhiyun items: 51*4882a593Smuzhiyun - const: wdog_clk 52*4882a593Smuzhiyun - const: apb_pclk 53*4882a593Smuzhiyun 54*4882a593Smuzhiyunrequired: 55*4882a593Smuzhiyun - compatible 56*4882a593Smuzhiyun - reg 57*4882a593Smuzhiyun - clocks 58*4882a593Smuzhiyun - clock-names 59*4882a593Smuzhiyun 60*4882a593SmuzhiyununevaluatedProperties: false 61*4882a593Smuzhiyun 62*4882a593Smuzhiyunexamples: 63*4882a593Smuzhiyun - | 64*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 65*4882a593Smuzhiyun watchdog@66090000 { 66*4882a593Smuzhiyun compatible = "arm,sp805", "arm,primecell"; 67*4882a593Smuzhiyun reg = <0x66090000 0x1000>; 68*4882a593Smuzhiyun interrupts = <GIC_SPI 406 IRQ_TYPE_LEVEL_HIGH>; 69*4882a593Smuzhiyun clocks = <&wdt_clk>, <&apb_pclk>; 70*4882a593Smuzhiyun clock-names = "wdog_clk", "apb_pclk"; 71*4882a593Smuzhiyun }; 72