1*4882a593Smuzhiyun* virtio memory mapped device 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunSee https://ozlabs.org/~rusty/virtio-spec/ for more details. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun 7*4882a593Smuzhiyun- compatible: "virtio,mmio" compatibility string 8*4882a593Smuzhiyun- reg: control registers base address and size including configuration space 9*4882a593Smuzhiyun- interrupts: interrupt generated by the device 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunRequired properties for virtio-iommu: 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun- #iommu-cells: When the node corresponds to a virtio-iommu device, it is 14*4882a593Smuzhiyun linked to DMA masters using the "iommus" or "iommu-map" 15*4882a593Smuzhiyun properties [1][2]. #iommu-cells specifies the size of the 16*4882a593Smuzhiyun "iommus" property. For virtio-iommu #iommu-cells must be 17*4882a593Smuzhiyun 1, each cell describing a single endpoint ID. 18*4882a593Smuzhiyun 19*4882a593SmuzhiyunOptional properties: 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun- iommus: If the device accesses memory through an IOMMU, it should 22*4882a593Smuzhiyun have an "iommus" property [1]. Since virtio-iommu itself 23*4882a593Smuzhiyun does not access memory through an IOMMU, the "virtio,mmio" 24*4882a593Smuzhiyun node cannot have both an "#iommu-cells" and an "iommus" 25*4882a593Smuzhiyun property. 26*4882a593Smuzhiyun 27*4882a593SmuzhiyunExample: 28*4882a593Smuzhiyun 29*4882a593Smuzhiyun virtio_block@3000 { 30*4882a593Smuzhiyun compatible = "virtio,mmio"; 31*4882a593Smuzhiyun reg = <0x3000 0x100>; 32*4882a593Smuzhiyun interrupts = <41>; 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun /* Device has endpoint ID 23 */ 35*4882a593Smuzhiyun iommus = <&viommu 23> 36*4882a593Smuzhiyun } 37*4882a593Smuzhiyun 38*4882a593Smuzhiyun viommu: iommu@3100 { 39*4882a593Smuzhiyun compatible = "virtio,mmio"; 40*4882a593Smuzhiyun reg = <0x3100 0x100>; 41*4882a593Smuzhiyun interrupts = <42>; 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun #iommu-cells = <1> 44*4882a593Smuzhiyun } 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun[1] Documentation/devicetree/bindings/iommu/iommu.txt 47*4882a593Smuzhiyun[2] Documentation/devicetree/bindings/pci/pci-iommu.txt 48