1*4882a593SmuzhiyunDevice-Tree bindings for rockchip mipi dsi driver 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: value should be "rockchip,rk32-dsi". 5*4882a593Smuzhiyun- rockchip,prop: dsi number. 6*4882a593Smuzhiyun- reg: physical base address of the hdmi and length of memory mapped 7*4882a593Smuzhiyun region. 8*4882a593Smuzhiyun- interrupts: interrupt number to the cpu. 9*4882a593Smuzhiyun 10*4882a593Smuzhiyun- clocks: must include clock specifiers corresponding to entries in the 11*4882a593Smuzhiyun clock-names property. 12*4882a593Smuzhiyun- clocks-names: list of clock names sorted in the same order as the clocks 13*4882a593Smuzhiyun property. Must contain "pclk_hdmi" and "hdcp_clk_hdmi". 14*4882a593Smuzhiyun- status: the dsi host status; 15*4882a593Smuzhiyun <disabled>: open the dsi host; 16*4882a593Smuzhiyun <okay>:close the dsi host; 17*4882a593Smuzhiyun 18*4882a593SmuzhiyunExample: 19*4882a593Smuzhiyun 20*4882a593Smuzhiyun dsihost0: mipi@ff960000{ 21*4882a593Smuzhiyun compatible = "rockchip,rk32-dsi"; 22*4882a593Smuzhiyun rockchip,prop = <0>; 23*4882a593Smuzhiyun reg = <0xff960000 0x4000>; 24*4882a593Smuzhiyun interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>; 25*4882a593Smuzhiyun clocks = <&clk_gates5 15>, <&clk_gates16 4> , <&pd_mipidsi>; 26*4882a593Smuzhiyun clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "pd_mipi_dsi"; 27*4882a593Smuzhiyun status = "okay"; 28*4882a593Smuzhiyun }; 29*4882a593Smuzhiyun 30*4882a593Smuzhiyun dsihost1: mipi@ff964000{ 31*4882a593Smuzhiyun compatible = "rockchip,rk32-dsi"; 32*4882a593Smuzhiyun rockchip,prop = <1>; 33*4882a593Smuzhiyun reg = <0xff964000 0x4000>; 34*4882a593Smuzhiyun interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>; 35*4882a593Smuzhiyun clocks = <&clk_gates5 15>, <&clk_gates16 5>, <&pd_mipidsi>; 36*4882a593Smuzhiyun clock-names = "clk_mipi_24m", "pclk_mipi_dsi", "pd_mipi_dsi"; 37*4882a593Smuzhiyun status = "okay"; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40