1Device-Tree bindings for Rockchip SoC display controller (VOP / LCDC) 2VOP (Video Output Process) / LCDC is the Display Controller for the 3ROCKCHIP series of SoCs which transfers the image data from a video memory 4buffer to an external LCD interface. 5 6Required properties: 7- compatible: value should be one of the following 8 "rockchip,rk3288-lcdc"; /* for RK3288 SoCs */ 9 "rockchip,rk3368-lcdc"; /* for RK3368 SoCs */ 10 "rockchip,rk322x-lcdc"; /* for RK322X SoCs */ 11 "rockchip,rk3399-lcdc"; /* for RK3399 SoCs */ 12- rockchip,prop: set the lcdc as primary or extend display. 13- rochchip,pwr18: set the controller IO voltage,0 is 3.3v,1 is 1.8v. 14- reg: physical base address and length of the LCDC registers set. 15- interrupts: interrupt number to the cpu and interrupt proterties. 16- pinctrl-names: must contain a "default" entry. 17- pinctrl-0: pin control group to be used for this controller. 18- pinctrl-1: pin control group to be used for gpio. 19- clocks: must include clock specifiers corresponding to entries in the 20 clock-names property. 21- clock-names: list of clock names sorted in the same order as the clocks 22 property.. 23 24Optional Properties: 25- rockchip,debug: printk debug message. 26- rockchip,mirror: the lcdc mirror function. 27- lcd_en:lcd_en: contain power control for lcd. 28 - rockchip,power_type: power type,GPIO or REGULATOR. 29 - gpios: pin number for gpio. 30 - rockchip,delay: delay time after set power. 31 32Example: 33 34SoC specific DT entry: 35 lcdc1: lcdc@ff940000 { 36 compatible = "rockchip,rk3288-lcdc"; 37 rockchip,prop = <PRMRY>; 38 rochchip,pwr18 = <0>; 39 reg = <0xff940000 0x10000>; 40 interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>; 41 pinctrl-names = "default", "gpio"; 42 pinctrl-0 = <&lcdc0_lcdc>; 43 pinctrl-1 = <&lcdc0_gpio>; 44 status = "disabled"; 45 clocks = <&clk_gates15 7>, <&dclk_lcdc1>, <&clk_gates15 8>, <&pd_vop1>; 46 clock-names = "aclk_lcdc", "dclk_lcdc", "hclk_lcdc", "pd_lcdc"; 47 }; 48 49 50Board specific DT entry: 51 52&lcdc1 { 53 status = "okay"; 54 power_ctr: power_ctr { 55 rockchip,debug = <0>; 56 rockchip,mirror = <NO_MIRROR>; 57 lcd_en:lcd_en { 58 rockchip,power_type = <GPIO>; 59 gpios = <&gpio7 GPIO_A3 GPIO_ACTIVE_HIGH>; 60 rockchip,delay = <10>; 61 }; 62 lcd_cs:lcd_cs { 63 rockchip,power_type = <GPIO>; 64 gpios = <&gpio7 GPIO_A4 GPIO_ACTIVE_HIGH>; 65 rockchip,delay = <10>; 66 }; 67 }; 68}; 69 70