1Device-Tree bindings for Rockchip Video Codec. 2 3Required properties: 4- compatible: There are several vcodec IP inside rockchip chips. 5 Decoder should be one of following: 6 "rockchip,vpu-decoder-v1", 7 "rockchip,avs-plus-decoder", 8 "rockchip,vpu-decoder-v2", 9 "rockchip,vpu-decoder-px30", 10 "rockchip,vpu-decoder-rk3288", 11 "rockchip,vpu-decoder-rk3368", 12 "rockchip,hevc-decoder", 13 "rockchip,hevc-decoder-px30", 14 "rockchip,hevc-decoder-rk3368", 15 "rockchip,rkv-decoder-v1", 16 "rockchip,rkv-decoder-v2", 17 "rockchip,rkv-decoder-rk3399", 18 "rockchip,rkv-decoder-rk3328", 19 "rockchip,rkv-jpeg-decoder-v1", 20 Encoder should be one of following: 21 "rockchip,vpu-encoder-v1", 22 "rockchip,vpu-encoder-v2", 23 "rockchip,vpu-encoder-px30", 24 "rockchip,rkv-encoder-v1", 25 "rockchip,rkv-encoder-v2", 26 "rockchip,rkv-encoder-rv1108", 27 "rockchip,hevc-encoder-v22", 28 29- rockchip,srv: The pointer of service device node. 30 the value must be the name of service device, like <&mpp_srv>. 31 32- rockchip,taskqueue-node: The taskqueue node number of current device working. 33 the value must between 0 and rockchip,taskqueue-count 34 35- rockchip,resetgroup-node: The resetgroup node number of current reset group. 36 If two devices have the same reset clk, they should in the same reset group. 37 the value must between 0 and rockchip,resetgroup-count 38 39- reset-name: The name of reset clk. 40 If two devices have the same reset clk, the reset-name should stay the same 41 and add "shared_" prefix. 42 43Example: 44 45DT entry: 46 47 vdpu: vdpu@ff650400 { 48 compatible = "rockchip,vpu-decoder-v2"; 49 reg = <0x0 0xff650400 0x0 0x400>; 50 interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH 0>; 51 interrupt-names = "irq_dec"; 52 clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; 53 clock-names = "aclk_vcodec", "hclk_vcodec"; 54 resets = <&cru SRST_H_VCODEC>, <&cru SRST_A_VCODEC>; 55 reset-names = "shared_video_h", "shared_video_a"; 56 iommus = <&vpu_mmu>; 57 power-domains = <&power RK3399_PD_VCODEC>; 58 rockchip,srv = <&mpp_srv>; 59 rockchip,taskqueue-node = <0>; 60 rockchip,resetgroup-node = <0>; 61 status = "disabled"; 62 }; 63 64 vepu: vepu@ff650000 { 65 compatible = "rockchip,vpu-encoder-v2"; 66 reg = <0x0 0xff650000 0x0 0x400>; 67 interrupts = <GIC_SPI 114 IRQ_TYPE_LEVEL_HIGH 0>; 68 interrupt-names = "irq_enc"; 69 clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; 70 clock-names = "aclk_vcodec", "hclk_vcodec"; 71 resets = <&cru SRST_H_VCODEC>, <&cru SRST_A_VCODEC>; 72 reset-names = "shared_video_h", "shared_video_a"; 73 iommus = <&vpu_mmu>; 74 rockchip,srv = <&mpp_srv>; 75 rockchip,taskqueue-node = <0>; 76 rockchip,resetgroup-node = <0>; 77 power-domains = <&power RK3399_PD_VCODEC>; 78 status = "disabled"; 79 }; 80 81 vpu_mmu: iommu@ff650800 { 82 compatible = "rockchip,iommu"; 83 reg = <0x0 0xff650800 0x0 0x40>; 84 interrupts = <GIC_SPI 115 IRQ_TYPE_LEVEL_HIGH 0>; 85 interrupt-names = "vpu_mmu"; 86 clocks = <&cru ACLK_VCODEC>, <&cru HCLK_VCODEC>; 87 clock-names = "aclk", "iface"; 88 power-domains = <&power RK3399_PD_VCODEC>; 89 #iommu-cells = <0>; 90 status = "disabled"; 91 }; 92