1*4882a593SmuzhiyunUSB NOP PHY 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: should be usb-nop-xceiv 5*4882a593Smuzhiyun- #phy-cells: Must be 0 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunOptional properties: 8*4882a593Smuzhiyun- clocks: phandle to the PHY clock. Use as per Documentation/devicetree 9*4882a593Smuzhiyun /bindings/clock/clock-bindings.txt 10*4882a593Smuzhiyun This property is required if clock-frequency is specified. 11*4882a593Smuzhiyun 12*4882a593Smuzhiyun- clock-names: Should be "main_clk" 13*4882a593Smuzhiyun 14*4882a593Smuzhiyun- clock-frequency: the clock frequency (in Hz) that the PHY clock must 15*4882a593Smuzhiyun be configured to. 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun- vcc-supply: phandle to the regulator that provides power to the PHY. 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun- reset-gpios: Should specify the GPIO for reset. 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun- vbus-detect-gpio: should specify the GPIO detecting a VBus insertion 22*4882a593Smuzhiyun (see Documentation/devicetree/bindings/gpio/gpio.txt) 23*4882a593Smuzhiyun- vbus-regulator : should specifiy the regulator supplying current drawn from 24*4882a593Smuzhiyun the VBus line (see Documentation/devicetree/bindings/regulator/regulator.txt). 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunExample: 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun hsusb1_phy { 29*4882a593Smuzhiyun compatible = "usb-nop-xceiv"; 30*4882a593Smuzhiyun clock-frequency = <19200000>; 31*4882a593Smuzhiyun clocks = <&osc 0>; 32*4882a593Smuzhiyun clock-names = "main_clk"; 33*4882a593Smuzhiyun vcc-supply = <&hsusb1_vcc_regulator>; 34*4882a593Smuzhiyun reset-gpios = <&gpio1 7 GPIO_ACTIVE_LOW>; 35*4882a593Smuzhiyun vbus-detect-gpio = <&gpio2 13 GPIO_ACTIVE_HIGH>; 36*4882a593Smuzhiyun vbus-regulator = <&vbus_regulator>; 37*4882a593Smuzhiyun #phy-cells = <0>; 38*4882a593Smuzhiyun }; 39*4882a593Smuzhiyun 40*4882a593Smuzhiyunhsusb1_phy is a NOP USB PHY device that gets its clock from an oscillator 41*4882a593Smuzhiyunand expects that clock to be configured to 19.2MHz by the NOP PHY driver. 42*4882a593Smuzhiyunhsusb1_vcc_regulator provides power to the PHY and GPIO 7 controls RESET. 43*4882a593SmuzhiyunGPIO 13 detects VBus insertion, and accordingly notifies the vbus-regulator. 44