1*4882a593Smuzhiyun* OHCI controller, NXP ohci-nxp variant 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunRequired properties: 4*4882a593Smuzhiyun- compatible: must be "nxp,ohci-nxp" 5*4882a593Smuzhiyun- reg: physical base address of the controller and length of memory mapped 6*4882a593Smuzhiyun region. 7*4882a593Smuzhiyun- interrupts: The OHCI interrupt 8*4882a593Smuzhiyun- transceiver: phandle of the associated ISP1301 device - this is necessary for 9*4882a593Smuzhiyun the UDC controller for connecting to the USB physical layer 10*4882a593Smuzhiyun 11*4882a593SmuzhiyunExample (LPC32xx): 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun isp1301: usb-transceiver@2c { 14*4882a593Smuzhiyun compatible = "nxp,isp1301"; 15*4882a593Smuzhiyun reg = <0x2c>; 16*4882a593Smuzhiyun }; 17*4882a593Smuzhiyun 18*4882a593Smuzhiyun ohci@31020000 { 19*4882a593Smuzhiyun compatible = "nxp,ohci-nxp"; 20*4882a593Smuzhiyun reg = <0x31020000 0x300>; 21*4882a593Smuzhiyun interrupt-parent = <&mic>; 22*4882a593Smuzhiyun interrupts = <0x3b 0>; 23*4882a593Smuzhiyun transceiver = <&isp1301>; 24*4882a593Smuzhiyun }; 25