1*4882a593SmuzhiyunNVIDIA Tegra xHCI controller 2*4882a593Smuzhiyun============================ 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunThe Tegra xHCI controller supports both USB2 and USB3 interfaces exposed by 5*4882a593Smuzhiyunthe Tegra XUSB pad controller. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun-------------------- 9*4882a593Smuzhiyun- compatible: Must be: 10*4882a593Smuzhiyun - Tegra124: "nvidia,tegra124-xusb" 11*4882a593Smuzhiyun - Tegra132: "nvidia,tegra132-xusb", "nvidia,tegra124-xusb" 12*4882a593Smuzhiyun - Tegra210: "nvidia,tegra210-xusb" 13*4882a593Smuzhiyun - Tegra186: "nvidia,tegra186-xusb" 14*4882a593Smuzhiyun- reg: Must contain the base and length of the xHCI host registers, XUSB FPCI 15*4882a593Smuzhiyun registers and XUSB IPFS registers. 16*4882a593Smuzhiyun- reg-names: Must contain the following entries: 17*4882a593Smuzhiyun - "hcd" 18*4882a593Smuzhiyun - "fpci" 19*4882a593Smuzhiyun - "ipfs" 20*4882a593Smuzhiyun- interrupts: Must contain the xHCI host interrupt and the mailbox interrupt. 21*4882a593Smuzhiyun- clocks: Must contain an entry for each entry in clock-names. 22*4882a593Smuzhiyun See ../clock/clock-bindings.txt for details. 23*4882a593Smuzhiyun- clock-names: Must include the following entries: 24*4882a593Smuzhiyun - xusb_host 25*4882a593Smuzhiyun - xusb_host_src 26*4882a593Smuzhiyun - xusb_falcon_src 27*4882a593Smuzhiyun - xusb_ss 28*4882a593Smuzhiyun - xusb_ss_src 29*4882a593Smuzhiyun - xusb_ss_div2 30*4882a593Smuzhiyun - xusb_hs_src 31*4882a593Smuzhiyun - xusb_fs_src 32*4882a593Smuzhiyun - pll_u_480m 33*4882a593Smuzhiyun - clk_m 34*4882a593Smuzhiyun - pll_e 35*4882a593Smuzhiyun- resets: Must contain an entry for each entry in reset-names. 36*4882a593Smuzhiyun See ../reset/reset.txt for details. 37*4882a593Smuzhiyun- reset-names: Must include the following entries: 38*4882a593Smuzhiyun - xusb_host 39*4882a593Smuzhiyun - xusb_ss 40*4882a593Smuzhiyun - xusb_src 41*4882a593Smuzhiyun Note that xusb_src is the shared reset for xusb_{ss,hs,fs,falcon,host}_src. 42*4882a593Smuzhiyun- nvidia,xusb-padctl: phandle to the XUSB pad controller that is used to 43*4882a593Smuzhiyun configure the USB pads used by the XHCI controller 44*4882a593Smuzhiyun 45*4882a593SmuzhiyunFor Tegra124 and Tegra132: 46*4882a593Smuzhiyun- avddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V. 47*4882a593Smuzhiyun- dvddio-pex-supply: PCIe/USB3 digital logic power supply. Must supply 1.05 V. 48*4882a593Smuzhiyun- avdd-usb-supply: USB controller power supply. Must supply 3.3 V. 49*4882a593Smuzhiyun- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V. 50*4882a593Smuzhiyun- avdd-pll-erefe-supply: PLLE reference PLL power supply. Must supply 1.05 V. 51*4882a593Smuzhiyun- avdd-usb-ss-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V. 52*4882a593Smuzhiyun- hvdd-usb-ss-supply: High-voltage PCIe/USB3 power supply. Must supply 3.3 V. 53*4882a593Smuzhiyun- hvdd-usb-ss-pll-e-supply: High-voltage PLLE power supply. Must supply 3.3 V. 54*4882a593Smuzhiyun 55*4882a593SmuzhiyunFor Tegra210: 56*4882a593Smuzhiyun- dvddio-pex-supply: PCIe/USB3 analog logic power supply. Must supply 1.05 V. 57*4882a593Smuzhiyun- hvddio-pex-supply: High-voltage PCIe/USB3 power supply. Must supply 1.8 V. 58*4882a593Smuzhiyun- avdd-usb-supply: USB controller power supply. Must supply 3.3 V. 59*4882a593Smuzhiyun- avdd-pll-utmip-supply: UTMI PLL power supply. Must supply 1.8 V. 60*4882a593Smuzhiyun- avdd-pll-uerefe-supply: PLLE reference PLL power supply. Must supply 1.05 V. 61*4882a593Smuzhiyun- dvdd-pex-pll-supply: PCIe/USB3 PLL power supply. Must supply 1.05 V. 62*4882a593Smuzhiyun- hvdd-pex-pll-e-supply: High-voltage PLLE power supply. Must supply 1.8 V. 63*4882a593Smuzhiyun 64*4882a593SmuzhiyunFor Tegra210 and Tegra186: 65*4882a593Smuzhiyun- power-domains: A list of PM domain specifiers that reference each power-domain 66*4882a593Smuzhiyun used by the xHCI controller. This list must comprise of a specifier for the 67*4882a593Smuzhiyun XUSBA and XUSBC power-domains. See ../power/power_domain.txt and 68*4882a593Smuzhiyun ../arm/tegra/nvidia,tegra20-pmc.txt for details. 69*4882a593Smuzhiyun- power-domain-names: A list of names that represent each of the specifiers in 70*4882a593Smuzhiyun the 'power-domains' property. Must include 'xusb_ss' and 'xusb_host' which 71*4882a593Smuzhiyun represent the power-domains XUSBA and XUSBC, respectively. See 72*4882a593Smuzhiyun ../power/power_domain.txt for details. 73*4882a593Smuzhiyun 74*4882a593SmuzhiyunOptional properties: 75*4882a593Smuzhiyun-------------------- 76*4882a593Smuzhiyun- phys: Must contain an entry for each entry in phy-names. 77*4882a593Smuzhiyun See ../phy/phy-bindings.txt for details. 78*4882a593Smuzhiyun- phy-names: Should include an entry for each PHY used by the controller. The 79*4882a593Smuzhiyun following PHYs are available: 80*4882a593Smuzhiyun - Tegra124: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1 81*4882a593Smuzhiyun - Tegra132: usb2-0, usb2-1, usb2-2, hsic-0, hsic-1, usb3-0, usb3-1 82*4882a593Smuzhiyun - Tegra210: usb2-0, usb2-1, usb2-2, usb2-3, hsic-0, usb3-0, usb3-1, usb3-2, 83*4882a593Smuzhiyun usb3-3 84*4882a593Smuzhiyun - Tegra186: usb2-0, usb2-1, usb2-2, hsic-0, usb3-0, usb3-1, usb3-2 85*4882a593Smuzhiyun 86*4882a593SmuzhiyunExample: 87*4882a593Smuzhiyun-------- 88*4882a593Smuzhiyun 89*4882a593Smuzhiyun usb@0,70090000 { 90*4882a593Smuzhiyun compatible = "nvidia,tegra124-xusb"; 91*4882a593Smuzhiyun reg = <0x0 0x70090000 0x0 0x8000>, 92*4882a593Smuzhiyun <0x0 0x70098000 0x0 0x1000>, 93*4882a593Smuzhiyun <0x0 0x70099000 0x0 0x1000>; 94*4882a593Smuzhiyun reg-names = "hcd", "fpci", "ipfs"; 95*4882a593Smuzhiyun 96*4882a593Smuzhiyun interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>, 97*4882a593Smuzhiyun <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; 98*4882a593Smuzhiyun 99*4882a593Smuzhiyun clocks = <&tegra_car TEGRA124_CLK_XUSB_HOST>, 100*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_XUSB_HOST_SRC>, 101*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_XUSB_FALCON_SRC>, 102*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_XUSB_SS>, 103*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_XUSB_SS_DIV2>, 104*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_XUSB_SS_SRC>, 105*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_XUSB_HS_SRC>, 106*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_XUSB_FS_SRC>, 107*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_PLL_U_480M>, 108*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_CLK_M>, 109*4882a593Smuzhiyun <&tegra_car TEGRA124_CLK_PLL_E>; 110*4882a593Smuzhiyun clock-names = "xusb_host", "xusb_host_src", "xusb_falcon_src", 111*4882a593Smuzhiyun "xusb_ss", "xusb_ss_div2", "xusb_ss_src", 112*4882a593Smuzhiyun "xusb_hs_src", "xusb_fs_src", "pll_u_480m", 113*4882a593Smuzhiyun "clk_m", "pll_e"; 114*4882a593Smuzhiyun resets = <&tegra_car 89>, <&tegra_car 156>, <&tegra_car 143>; 115*4882a593Smuzhiyun reset-names = "xusb_host", "xusb_ss", "xusb_src"; 116*4882a593Smuzhiyun 117*4882a593Smuzhiyun nvidia,xusb-padctl = <&padctl>; 118*4882a593Smuzhiyun 119*4882a593Smuzhiyun phys = <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-1}>, /* mini-PCIe USB */ 120*4882a593Smuzhiyun <&{/padctl@0,7009f000/pads/usb2/lanes/usb2-2}>, /* USB A */ 121*4882a593Smuzhiyun <&{/padctl@0,7009f000/pads/pcie/lanes/pcie-0}>; /* USB A */ 122*4882a593Smuzhiyun phy-names = "usb2-1", "usb2-2", "usb3-0"; 123*4882a593Smuzhiyun 124*4882a593Smuzhiyun avddio-pex-supply = <&vdd_1v05_run>; 125*4882a593Smuzhiyun dvddio-pex-supply = <&vdd_1v05_run>; 126*4882a593Smuzhiyun avdd-usb-supply = <&vdd_3v3_lp0>; 127*4882a593Smuzhiyun avdd-pll-utmip-supply = <&vddio_1v8>; 128*4882a593Smuzhiyun avdd-pll-erefe-supply = <&avdd_1v05_run>; 129*4882a593Smuzhiyun avdd-usb-ss-pll-supply = <&vdd_1v05_run>; 130*4882a593Smuzhiyun hvdd-usb-ss-supply = <&vdd_3v3_lp0>; 131*4882a593Smuzhiyun hvdd-usb-ss-pll-e-supply = <&vdd_3v3_lp0>; 132*4882a593Smuzhiyun }; 133