1*4882a593Smuzhiyun# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: "http://devicetree.org/schemas/usb/nvidia,tegra-xudc.yaml#" 5*4882a593Smuzhiyun$schema: "http://devicetree.org/meta-schemas/core.yaml#" 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Device tree binding for NVIDIA Tegra XUSB device mode controller (XUDC) 8*4882a593Smuzhiyun 9*4882a593Smuzhiyundescription: 10*4882a593Smuzhiyun The Tegra XUDC controller supports both USB 2.0 HighSpeed/FullSpeed and 11*4882a593Smuzhiyun USB 3.0 SuperSpeed protocols. 12*4882a593Smuzhiyun 13*4882a593Smuzhiyunmaintainers: 14*4882a593Smuzhiyun - Nagarjuna Kristam <nkristam@nvidia.com> 15*4882a593Smuzhiyun - JC Kuo <jckuo@nvidia.com> 16*4882a593Smuzhiyun - Thierry Reding <treding@nvidia.com> 17*4882a593Smuzhiyun 18*4882a593Smuzhiyunproperties: 19*4882a593Smuzhiyun compatible: 20*4882a593Smuzhiyun items: 21*4882a593Smuzhiyun - enum: 22*4882a593Smuzhiyun - nvidia,tegra210-xudc # For Tegra210 23*4882a593Smuzhiyun - nvidia,tegra186-xudc # For Tegra186 24*4882a593Smuzhiyun - nvidia,tegra194-xudc # For Tegra194 25*4882a593Smuzhiyun 26*4882a593Smuzhiyun reg: 27*4882a593Smuzhiyun minItems: 2 28*4882a593Smuzhiyun maxItems: 3 29*4882a593Smuzhiyun items: 30*4882a593Smuzhiyun - description: XUSB device controller registers 31*4882a593Smuzhiyun - description: XUSB device PCI Config registers 32*4882a593Smuzhiyun - description: XUSB device registers. 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun reg-names: 35*4882a593Smuzhiyun minItems: 2 36*4882a593Smuzhiyun maxItems: 3 37*4882a593Smuzhiyun items: 38*4882a593Smuzhiyun - const: base 39*4882a593Smuzhiyun - const: fpci 40*4882a593Smuzhiyun - const: ipfs 41*4882a593Smuzhiyun 42*4882a593Smuzhiyun interrupts: 43*4882a593Smuzhiyun maxItems: 1 44*4882a593Smuzhiyun description: Must contain the XUSB device interrupt. 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun clocks: 47*4882a593Smuzhiyun minItems: 4 48*4882a593Smuzhiyun maxItems: 5 49*4882a593Smuzhiyun items: 50*4882a593Smuzhiyun - description: Clock to enable core XUSB dev clock. 51*4882a593Smuzhiyun - description: Clock to enable XUSB super speed clock. 52*4882a593Smuzhiyun - description: Clock to enable XUSB super speed dev clock. 53*4882a593Smuzhiyun - description: Clock to enable XUSB high speed dev clock. 54*4882a593Smuzhiyun - description: Clock to enable XUSB full speed dev clock. 55*4882a593Smuzhiyun 56*4882a593Smuzhiyun clock-names: 57*4882a593Smuzhiyun minItems: 4 58*4882a593Smuzhiyun maxItems: 5 59*4882a593Smuzhiyun items: 60*4882a593Smuzhiyun - const: dev 61*4882a593Smuzhiyun - const: ss 62*4882a593Smuzhiyun - const: ss_src 63*4882a593Smuzhiyun - const: fs_src 64*4882a593Smuzhiyun - const: hs_src 65*4882a593Smuzhiyun 66*4882a593Smuzhiyun power-domains: 67*4882a593Smuzhiyun items: 68*4882a593Smuzhiyun - description: XUSBB(device) power-domain 69*4882a593Smuzhiyun - description: XUSBA(superspeed) power-domain 70*4882a593Smuzhiyun 71*4882a593Smuzhiyun power-domain-names: 72*4882a593Smuzhiyun items: 73*4882a593Smuzhiyun - const: dev 74*4882a593Smuzhiyun - const: ss 75*4882a593Smuzhiyun 76*4882a593Smuzhiyun nvidia,xusb-padctl: 77*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/phandle-array 78*4882a593Smuzhiyun description: 79*4882a593Smuzhiyun phandle to the XUSB pad controller that is used to configure the USB pads 80*4882a593Smuzhiyun used by the XUDC controller. 81*4882a593Smuzhiyun 82*4882a593Smuzhiyun phys: 83*4882a593Smuzhiyun minItems: 1 84*4882a593Smuzhiyun description: 85*4882a593Smuzhiyun Must contain an entry for each entry in phy-names. 86*4882a593Smuzhiyun See ../phy/phy-bindings.txt for details. 87*4882a593Smuzhiyun 88*4882a593Smuzhiyun phy-names: 89*4882a593Smuzhiyun minItems: 1 90*4882a593Smuzhiyun items: 91*4882a593Smuzhiyun - const: usb2-0 92*4882a593Smuzhiyun - const: usb2-1 93*4882a593Smuzhiyun - const: usb2-2 94*4882a593Smuzhiyun - const: usb2-3 95*4882a593Smuzhiyun - const: usb3-0 96*4882a593Smuzhiyun - const: usb3-1 97*4882a593Smuzhiyun - const: usb3-2 98*4882a593Smuzhiyun - const: usb3-3 99*4882a593Smuzhiyun 100*4882a593Smuzhiyun avddio-usb-supply: 101*4882a593Smuzhiyun description: PCIe/USB3 analog logic power supply. Must supply 1.05 V. 102*4882a593Smuzhiyun 103*4882a593Smuzhiyun hvdd-usb-supply: 104*4882a593Smuzhiyun description: USB controller power supply. Must supply 3.3 V. 105*4882a593Smuzhiyun 106*4882a593Smuzhiyunrequired: 107*4882a593Smuzhiyun - compatible 108*4882a593Smuzhiyun - reg 109*4882a593Smuzhiyun - reg-names 110*4882a593Smuzhiyun - interrupts 111*4882a593Smuzhiyun - clocks 112*4882a593Smuzhiyun - clock-names 113*4882a593Smuzhiyun - power-domains 114*4882a593Smuzhiyun - power-domain-names 115*4882a593Smuzhiyun - nvidia,xusb-padctl 116*4882a593Smuzhiyun - phys 117*4882a593Smuzhiyun - phy-names 118*4882a593Smuzhiyun 119*4882a593SmuzhiyunallOf: 120*4882a593Smuzhiyun - if: 121*4882a593Smuzhiyun properties: 122*4882a593Smuzhiyun compatible: 123*4882a593Smuzhiyun contains: 124*4882a593Smuzhiyun enum: 125*4882a593Smuzhiyun - nvidia,tegra210-xudc 126*4882a593Smuzhiyun then: 127*4882a593Smuzhiyun properties: 128*4882a593Smuzhiyun reg: 129*4882a593Smuzhiyun minItems: 3 130*4882a593Smuzhiyun reg-names: 131*4882a593Smuzhiyun minItems: 3 132*4882a593Smuzhiyun clocks: 133*4882a593Smuzhiyun minItems: 5 134*4882a593Smuzhiyun clock-names: 135*4882a593Smuzhiyun minItems: 5 136*4882a593Smuzhiyun required: 137*4882a593Smuzhiyun - avddio-usb-supply 138*4882a593Smuzhiyun - hvdd-usb-supply 139*4882a593Smuzhiyun 140*4882a593Smuzhiyun - if: 141*4882a593Smuzhiyun properties: 142*4882a593Smuzhiyun compatible: 143*4882a593Smuzhiyun contains: 144*4882a593Smuzhiyun enum: 145*4882a593Smuzhiyun - nvidia,tegra186-xudc 146*4882a593Smuzhiyun - nvidia,tegra194-xudc 147*4882a593Smuzhiyun then: 148*4882a593Smuzhiyun properties: 149*4882a593Smuzhiyun reg: 150*4882a593Smuzhiyun maxItems: 2 151*4882a593Smuzhiyun reg-names: 152*4882a593Smuzhiyun maxItems: 2 153*4882a593Smuzhiyun clocks: 154*4882a593Smuzhiyun maxItems: 4 155*4882a593Smuzhiyun clock-names: 156*4882a593Smuzhiyun maxItems: 4 157*4882a593Smuzhiyun 158*4882a593SmuzhiyunadditionalProperties: false 159*4882a593Smuzhiyun 160*4882a593Smuzhiyunexamples: 161*4882a593Smuzhiyun - | 162*4882a593Smuzhiyun #include <dt-bindings/clock/tegra210-car.h> 163*4882a593Smuzhiyun #include <dt-bindings/gpio/tegra-gpio.h> 164*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 165*4882a593Smuzhiyun 166*4882a593Smuzhiyun usb@700d0000 { 167*4882a593Smuzhiyun compatible = "nvidia,tegra210-xudc"; 168*4882a593Smuzhiyun reg = <0x700d0000 0x8000>, 169*4882a593Smuzhiyun <0x700d8000 0x1000>, 170*4882a593Smuzhiyun <0x700d9000 0x1000>; 171*4882a593Smuzhiyun reg-names = "base", "fpci", "ipfs"; 172*4882a593Smuzhiyun 173*4882a593Smuzhiyun interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>; 174*4882a593Smuzhiyun 175*4882a593Smuzhiyun clocks = <&tegra_car TEGRA210_CLK_XUSB_DEV>, 176*4882a593Smuzhiyun <&tegra_car TEGRA210_CLK_XUSB_SS>, 177*4882a593Smuzhiyun <&tegra_car TEGRA210_CLK_XUSB_SSP_SRC>, 178*4882a593Smuzhiyun <&tegra_car TEGRA210_CLK_XUSB_FS_SRC>, 179*4882a593Smuzhiyun <&tegra_car TEGRA210_CLK_XUSB_HS_SRC>; 180*4882a593Smuzhiyun clock-names = "dev", "ss", "ss_src", "fs_src", "hs_src"; 181*4882a593Smuzhiyun 182*4882a593Smuzhiyun power-domains = <&pd_xusbdev>, <&pd_xusbss>; 183*4882a593Smuzhiyun power-domain-names = "dev", "ss"; 184*4882a593Smuzhiyun 185*4882a593Smuzhiyun nvidia,xusb-padctl = <&padctl>; 186*4882a593Smuzhiyun 187*4882a593Smuzhiyun phys = <µ_b>; 188*4882a593Smuzhiyun phy-names = "usb2-0"; 189*4882a593Smuzhiyun 190*4882a593Smuzhiyun avddio-usb-supply = <&vdd_pex_1v05>; 191*4882a593Smuzhiyun hvdd-usb-supply = <&vdd_3v3_sys>; 192*4882a593Smuzhiyun }; 193