1*4882a593SmuzhiyunMediaTek musb DRD/OTG controller 2*4882a593Smuzhiyun------------------------------------------- 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties: 5*4882a593Smuzhiyun - compatible : should be one of: 6*4882a593Smuzhiyun "mediatek,mt2701-musb" 7*4882a593Smuzhiyun ... 8*4882a593Smuzhiyun followed by "mediatek,mtk-musb" 9*4882a593Smuzhiyun - reg : specifies physical base address and size of 10*4882a593Smuzhiyun the registers 11*4882a593Smuzhiyun - interrupts : interrupt used by musb controller 12*4882a593Smuzhiyun - interrupt-names : must be "mc" 13*4882a593Smuzhiyun - phys : PHY specifier for the OTG phy 14*4882a593Smuzhiyun - dr_mode : should be one of "host", "peripheral" or "otg", 15*4882a593Smuzhiyun refer to usb/generic.txt 16*4882a593Smuzhiyun - clocks : a list of phandle + clock-specifier pairs, one for 17*4882a593Smuzhiyun each entry in clock-names 18*4882a593Smuzhiyun - clock-names : must contain "main", "mcu", "univpll" 19*4882a593Smuzhiyun for clocks of controller 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunOptional properties: 22*4882a593Smuzhiyun - power-domains : a phandle to USB power domain node to control USB's 23*4882a593Smuzhiyun MTCMOS 24*4882a593Smuzhiyun 25*4882a593SmuzhiyunRequired child nodes: 26*4882a593Smuzhiyun usb connector node as defined in bindings/connector/usb-connector.yaml 27*4882a593SmuzhiyunOptional properties: 28*4882a593Smuzhiyun - id-gpios : input GPIO for USB ID pin. 29*4882a593Smuzhiyun - vbus-gpios : input GPIO for USB VBUS pin. 30*4882a593Smuzhiyun - vbus-supply : reference to the VBUS regulator, needed when supports 31*4882a593Smuzhiyun dual-role mode 32*4882a593Smuzhiyun - usb-role-switch : use USB Role Switch to support dual-role switch, see 33*4882a593Smuzhiyun usb/generic.txt. 34*4882a593Smuzhiyun 35*4882a593SmuzhiyunExample: 36*4882a593Smuzhiyun 37*4882a593Smuzhiyunusb2: usb@11200000 { 38*4882a593Smuzhiyun compatible = "mediatek,mt2701-musb", 39*4882a593Smuzhiyun "mediatek,mtk-musb"; 40*4882a593Smuzhiyun reg = <0 0x11200000 0 0x1000>; 41*4882a593Smuzhiyun interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_LOW>; 42*4882a593Smuzhiyun interrupt-names = "mc"; 43*4882a593Smuzhiyun phys = <&u2port2 PHY_TYPE_USB2>; 44*4882a593Smuzhiyun dr_mode = "otg"; 45*4882a593Smuzhiyun clocks = <&pericfg CLK_PERI_USB0>, 46*4882a593Smuzhiyun <&pericfg CLK_PERI_USB0_MCU>, 47*4882a593Smuzhiyun <&pericfg CLK_PERI_USB_SLV>; 48*4882a593Smuzhiyun clock-names = "main","mcu","univpll"; 49*4882a593Smuzhiyun power-domains = <&scpsys MT2701_POWER_DOMAIN_IFR_MSC>; 50*4882a593Smuzhiyun usb-role-switch; 51*4882a593Smuzhiyun connector{ 52*4882a593Smuzhiyun compatible = "gpio-usb-b-connector", "usb-b-connector"; 53*4882a593Smuzhiyun type = "micro"; 54*4882a593Smuzhiyun id-gpios = <&pio 44 GPIO_ACTIVE_HIGH>; 55*4882a593Smuzhiyun vbus-supply = <&usb_vbus>; 56*4882a593Smuzhiyun }; 57*4882a593Smuzhiyun}; 58