1*4882a593SmuzhiyunST DWC3 glue logic 2*4882a593Smuzhiyun 3*4882a593SmuzhiyunThis file documents the parameters for the dwc3-st driver. 4*4882a593SmuzhiyunThis driver controls the glue logic used to configure the dwc3 core on 5*4882a593SmuzhiyunSTiH407 based platforms. 6*4882a593Smuzhiyun 7*4882a593SmuzhiyunRequired properties: 8*4882a593Smuzhiyun - compatible : must be "st,stih407-dwc3" 9*4882a593Smuzhiyun - reg : glue logic base address and USB syscfg ctrl register offset 10*4882a593Smuzhiyun - reg-names : should be "reg-glue" and "syscfg-reg" 11*4882a593Smuzhiyun - st,syscon : should be phandle to system configuration node which 12*4882a593Smuzhiyun encompasses the glue registers 13*4882a593Smuzhiyun - resets : list of phandle and reset specifier pairs. There should be two entries, one 14*4882a593Smuzhiyun for the powerdown and softreset lines of the usb3 IP 15*4882a593Smuzhiyun - reset-names : list of reset signal names. Names should be "powerdown" and "softreset" 16*4882a593SmuzhiyunSee: Documentation/devicetree/bindings/reset/st,sti-powerdown.txt 17*4882a593SmuzhiyunSee: Documentation/devicetree/bindings/reset/reset.txt 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun - #address-cells, #size-cells : should be '1' if the device has sub-nodes 20*4882a593Smuzhiyun with 'reg' property 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun - pinctl-names : A pinctrl state named "default" must be defined 23*4882a593SmuzhiyunSee: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt 24*4882a593Smuzhiyun 25*4882a593Smuzhiyun - pinctrl-0 : Pin control group 26*4882a593SmuzhiyunSee: Documentation/devicetree/bindings/pinctrl/pinctrl-bindings.txt 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun - ranges : allows valid 1:1 translation between child's address space and 29*4882a593Smuzhiyun parent's address space 30*4882a593Smuzhiyun 31*4882a593SmuzhiyunSub-nodes: 32*4882a593SmuzhiyunThe dwc3 core should be added as subnode to ST DWC3 glue as shown in the 33*4882a593Smuzhiyunexample below. The DT binding details of dwc3 can be found in: 34*4882a593SmuzhiyunDocumentation/devicetree/bindings/usb/dwc3.txt 35*4882a593Smuzhiyun 36*4882a593SmuzhiyunNB: The dr_mode property described in [1] is NOT optional for this driver, as the default value 37*4882a593Smuzhiyunis "otg", which isn't supported by this SoC. Valid dr_mode values for dwc3-st are either "host" 38*4882a593Smuzhiyunor "device". 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun[1] Documentation/devicetree/bindings/usb/generic.txt 41*4882a593Smuzhiyun 42*4882a593SmuzhiyunExample: 43*4882a593Smuzhiyun 44*4882a593Smuzhiyunst_dwc3: dwc3@8f94000 { 45*4882a593Smuzhiyun compatible = "st,stih407-dwc3"; 46*4882a593Smuzhiyun reg = <0x08f94000 0x1000>, <0x110 0x4>; 47*4882a593Smuzhiyun reg-names = "reg-glue", "syscfg-reg"; 48*4882a593Smuzhiyun st,syscfg = <&syscfg_core>; 49*4882a593Smuzhiyun resets = <&powerdown STIH407_USB3_POWERDOWN>, 50*4882a593Smuzhiyun <&softreset STIH407_MIPHY2_SOFTRESET>; 51*4882a593Smuzhiyun reset-names = "powerdown", "softreset"; 52*4882a593Smuzhiyun #address-cells = <1>; 53*4882a593Smuzhiyun #size-cells = <1>; 54*4882a593Smuzhiyun pinctrl-names = "default"; 55*4882a593Smuzhiyun pinctrl-0 = <&pinctrl_usb3>; 56*4882a593Smuzhiyun ranges; 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun dwc3: dwc3@9900000 { 59*4882a593Smuzhiyun compatible = "snps,dwc3"; 60*4882a593Smuzhiyun reg = <0x09900000 0x100000>; 61*4882a593Smuzhiyun interrupts = <GIC_SPI 155 IRQ_TYPE_NONE>; 62*4882a593Smuzhiyun dr_mode = "host"; 63*4882a593Smuzhiyun phy-names = "usb2-phy", "usb3-phy"; 64*4882a593Smuzhiyun phys = <&usb2_picophy2>, <&phy_port2 PHY_TYPE_USB3>; 65*4882a593Smuzhiyun }; 66*4882a593Smuzhiyun}; 67