1*4882a593SmuzhiyunTI DA8xx MUSB 2*4882a593Smuzhiyun~~~~~~~~~~~~~ 3*4882a593SmuzhiyunFor DA8xx/OMAP-L1x/AM17xx/AM18xx platforms. 4*4882a593Smuzhiyun 5*4882a593SmuzhiyunRequired properties: 6*4882a593Smuzhiyun~~~~~~~~~~~~~~~~~~~~ 7*4882a593Smuzhiyun - compatible : Should be set to "ti,da830-musb". 8*4882a593Smuzhiyun 9*4882a593Smuzhiyun - reg: Offset and length of the USB controller register set. 10*4882a593Smuzhiyun 11*4882a593Smuzhiyun - interrupts: The USB interrupt number. 12*4882a593Smuzhiyun 13*4882a593Smuzhiyun - interrupt-names: Should be set to "mc". 14*4882a593Smuzhiyun 15*4882a593Smuzhiyun - dr_mode: The USB operation mode. Should be one of "host", "peripheral" or "otg". 16*4882a593Smuzhiyun 17*4882a593Smuzhiyun - phys: Phandle for the PHY device 18*4882a593Smuzhiyun 19*4882a593Smuzhiyun - phy-names: Should be "usb-phy" 20*4882a593Smuzhiyun 21*4882a593Smuzhiyun - dmas: specifies the dma channels 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun - dma-names: specifies the names of the channels. Use "rxN" for receive 24*4882a593Smuzhiyun and "txN" for transmit endpoints. N specifies the endpoint number. 25*4882a593Smuzhiyun 26*4882a593SmuzhiyunOptional properties: 27*4882a593Smuzhiyun~~~~~~~~~~~~~~~~~~~~ 28*4882a593Smuzhiyun - vbus-supply: Phandle to a regulator providing the USB bus power. 29*4882a593Smuzhiyun 30*4882a593SmuzhiyunDMA 31*4882a593Smuzhiyun~~~ 32*4882a593Smuzhiyun- compatible: ti,da830-cppi41 33*4882a593Smuzhiyun- reg: offset and length of the following register spaces: CPPI DMA Controller, 34*4882a593Smuzhiyun CPPI DMA Scheduler, Queue Manager 35*4882a593Smuzhiyun- reg-names: "controller", "scheduler", "queuemgr" 36*4882a593Smuzhiyun- #dma-cells: should be set to 2. The first number represents the 37*4882a593Smuzhiyun channel number (0 … 3 for endpoints 1 … 4). 38*4882a593Smuzhiyun The second number is 0 for RX and 1 for TX transfers. 39*4882a593Smuzhiyun- #dma-channels: should be set to 4 representing the 4 endpoints. 40*4882a593Smuzhiyun 41*4882a593SmuzhiyunExample: 42*4882a593Smuzhiyun usb_phy: usb-phy { 43*4882a593Smuzhiyun compatible = "ti,da830-usb-phy"; 44*4882a593Smuzhiyun #phy-cells = <0>; 45*4882a593Smuzhiyun }; 46*4882a593Smuzhiyun usb0: usb@200000 { 47*4882a593Smuzhiyun compatible = "ti,da830-musb"; 48*4882a593Smuzhiyun reg = <0x00200000 0x1000>; 49*4882a593Smuzhiyun ranges; 50*4882a593Smuzhiyun #address-cells = <1>; 51*4882a593Smuzhiyun #size-cells = <1>; 52*4882a593Smuzhiyun interrupts = <58>; 53*4882a593Smuzhiyun interrupt-names = "mc"; 54*4882a593Smuzhiyun 55*4882a593Smuzhiyun dr_mode = "host"; 56*4882a593Smuzhiyun vbus-supply = <&usb_vbus>; 57*4882a593Smuzhiyun phys = <&usb_phy 0>; 58*4882a593Smuzhiyun phy-names = "usb-phy"; 59*4882a593Smuzhiyun 60*4882a593Smuzhiyun dmas = <&cppi41dma 0 0 &cppi41dma 1 0 61*4882a593Smuzhiyun &cppi41dma 2 0 &cppi41dma 3 0 62*4882a593Smuzhiyun &cppi41dma 0 1 &cppi41dma 1 1 63*4882a593Smuzhiyun &cppi41dma 2 1 &cppi41dma 3 1>; 64*4882a593Smuzhiyun dma-names = 65*4882a593Smuzhiyun "rx1", "rx2", "rx3", "rx4", 66*4882a593Smuzhiyun "tx1", "tx2", "tx3", "tx4"; 67*4882a593Smuzhiyun 68*4882a593Smuzhiyun 69*4882a593Smuzhiyun cppi41dma: dma-controller@201000 { 70*4882a593Smuzhiyun compatible = "ti,da830-cppi41"; 71*4882a593Smuzhiyun reg = <0x201000 0x1000 72*4882a593Smuzhiyun 0x202000 0x1000 73*4882a593Smuzhiyun 0x204000 0x4000>; 74*4882a593Smuzhiyun reg-names = "controller", "scheduler", "queuemgr"; 75*4882a593Smuzhiyun interrupts = <58>; 76*4882a593Smuzhiyun #dma-cells = <2>; 77*4882a593Smuzhiyun #dma-channels = <4>; 78*4882a593Smuzhiyun }; 79*4882a593Smuzhiyun 80*4882a593Smuzhiyun }; 81