1*4882a593Smuzhiyun# SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause 2*4882a593Smuzhiyun%YAML 1.2 3*4882a593Smuzhiyun--- 4*4882a593Smuzhiyun$id: http://devicetree.org/schemas/usb/cdns,usb3.yaml# 5*4882a593Smuzhiyun$schema: http://devicetree.org/meta-schemas/core.yaml# 6*4882a593Smuzhiyun 7*4882a593Smuzhiyuntitle: Cadence USBSS-DRD controller bindings 8*4882a593Smuzhiyun 9*4882a593Smuzhiyunmaintainers: 10*4882a593Smuzhiyun - Pawel Laszczak <pawell@cadence.com> 11*4882a593Smuzhiyun 12*4882a593Smuzhiyunproperties: 13*4882a593Smuzhiyun compatible: 14*4882a593Smuzhiyun const: cdns,usb3 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun reg: 17*4882a593Smuzhiyun items: 18*4882a593Smuzhiyun - description: OTG controller registers 19*4882a593Smuzhiyun - description: XHCI Host controller registers 20*4882a593Smuzhiyun - description: DEVICE controller registers 21*4882a593Smuzhiyun 22*4882a593Smuzhiyun reg-names: 23*4882a593Smuzhiyun items: 24*4882a593Smuzhiyun - const: otg 25*4882a593Smuzhiyun - const: xhci 26*4882a593Smuzhiyun - const: dev 27*4882a593Smuzhiyun 28*4882a593Smuzhiyun interrupts: 29*4882a593Smuzhiyun items: 30*4882a593Smuzhiyun - description: OTG/DRD controller interrupt 31*4882a593Smuzhiyun - description: XHCI host controller interrupt 32*4882a593Smuzhiyun - description: Device controller interrupt 33*4882a593Smuzhiyun 34*4882a593Smuzhiyun interrupt-names: 35*4882a593Smuzhiyun items: 36*4882a593Smuzhiyun - const: host 37*4882a593Smuzhiyun - const: peripheral 38*4882a593Smuzhiyun - const: otg 39*4882a593Smuzhiyun 40*4882a593Smuzhiyun dr_mode: 41*4882a593Smuzhiyun enum: [host, otg, peripheral] 42*4882a593Smuzhiyun 43*4882a593Smuzhiyun maximum-speed: 44*4882a593Smuzhiyun enum: [super-speed, high-speed, full-speed] 45*4882a593Smuzhiyun 46*4882a593Smuzhiyun phys: 47*4882a593Smuzhiyun minItems: 1 48*4882a593Smuzhiyun maxItems: 2 49*4882a593Smuzhiyun 50*4882a593Smuzhiyun phy-names: 51*4882a593Smuzhiyun minItems: 1 52*4882a593Smuzhiyun maxItems: 2 53*4882a593Smuzhiyun items: 54*4882a593Smuzhiyun anyOf: 55*4882a593Smuzhiyun - const: cdns3,usb2-phy 56*4882a593Smuzhiyun - const: cdns3,usb3-phy 57*4882a593Smuzhiyun 58*4882a593Smuzhiyun cdns,on-chip-buff-size: 59*4882a593Smuzhiyun description: 60*4882a593Smuzhiyun size of memory intended as internal memory for endpoints 61*4882a593Smuzhiyun buffers expressed in KB 62*4882a593Smuzhiyun $ref: /schemas/types.yaml#/definitions/uint32 63*4882a593Smuzhiyun 64*4882a593Smuzhiyun cdns,phyrst-a-enable: 65*4882a593Smuzhiyun description: Enable resetting of PHY if Rx fail is detected 66*4882a593Smuzhiyun type: boolean 67*4882a593Smuzhiyun 68*4882a593Smuzhiyunrequired: 69*4882a593Smuzhiyun - compatible 70*4882a593Smuzhiyun - reg 71*4882a593Smuzhiyun - reg-names 72*4882a593Smuzhiyun - interrupts 73*4882a593Smuzhiyun 74*4882a593SmuzhiyunadditionalProperties: false 75*4882a593Smuzhiyun 76*4882a593Smuzhiyunexamples: 77*4882a593Smuzhiyun - | 78*4882a593Smuzhiyun #include <dt-bindings/interrupt-controller/arm-gic.h> 79*4882a593Smuzhiyun bus { 80*4882a593Smuzhiyun #address-cells = <2>; 81*4882a593Smuzhiyun #size-cells = <2>; 82*4882a593Smuzhiyun 83*4882a593Smuzhiyun usb@6000000 { 84*4882a593Smuzhiyun compatible = "cdns,usb3"; 85*4882a593Smuzhiyun reg = <0x00 0x6000000 0x00 0x10000>, 86*4882a593Smuzhiyun <0x00 0x6010000 0x00 0x10000>, 87*4882a593Smuzhiyun <0x00 0x6020000 0x00 0x10000>; 88*4882a593Smuzhiyun reg-names = "otg", "xhci", "dev"; 89*4882a593Smuzhiyun interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>, 90*4882a593Smuzhiyun <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>, 91*4882a593Smuzhiyun <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>; 92*4882a593Smuzhiyun interrupt-names = "host", "peripheral", "otg"; 93*4882a593Smuzhiyun maximum-speed = "super-speed"; 94*4882a593Smuzhiyun dr_mode = "otg"; 95*4882a593Smuzhiyun }; 96*4882a593Smuzhiyun }; 97