1*4882a593SmuzhiyunBroadcom USB Device Controller (BDC) 2*4882a593Smuzhiyun==================================== 3*4882a593Smuzhiyun 4*4882a593SmuzhiyunRequired properties: 5*4882a593Smuzhiyun 6*4882a593Smuzhiyun- compatible: must be one of: 7*4882a593Smuzhiyun "brcm,bdc-udc-v2" 8*4882a593Smuzhiyun "brcm,bdc" 9*4882a593Smuzhiyun- reg: the base register address and length 10*4882a593Smuzhiyun- interrupts: the interrupt line for this controller 11*4882a593Smuzhiyun 12*4882a593SmuzhiyunOptional properties: 13*4882a593Smuzhiyun 14*4882a593SmuzhiyunOn Broadcom STB platforms, these properties are required: 15*4882a593Smuzhiyun 16*4882a593Smuzhiyun- phys: phandle to one or two USB PHY blocks 17*4882a593Smuzhiyun NOTE: Some SoC's have a single phy and some have 18*4882a593Smuzhiyun USB 2.0 and USB 3.0 phys 19*4882a593Smuzhiyun- clocks: phandle to the functional clock of this block 20*4882a593Smuzhiyun 21*4882a593SmuzhiyunExample: 22*4882a593Smuzhiyun 23*4882a593Smuzhiyun bdc@f0b02000 { 24*4882a593Smuzhiyun compatible = "brcm,bdc-udc-v2"; 25*4882a593Smuzhiyun reg = <0xf0b02000 0xfc4>; 26*4882a593Smuzhiyun interrupts = <0x0 0x60 0x0>; 27*4882a593Smuzhiyun phys = <&usbphy_0 0x0>; 28*4882a593Smuzhiyun clocks = <&sw_usbd>; 29*4882a593Smuzhiyun }; 30